diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-14 16:20:22 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-23 21:34:21 +0100 |
| commit | 8c190f3518d504d904692e93e7881c379b89f542 (patch) | |
| tree | 007e007823bc87be9416573c389cf05259a5e212 /src/mainboard/pcengines/apu1/platform_cfg.h | |
| parent | f09e6d47b8174017d8964780b916dec9dd0b2009 (diff) | |
pcengines/apu1: New board PC Engines APU1
While we cannot recreate exact copies of PC Engines APU1 firmware images,
I shall upstream the vital changes for coreboot from the following tarballs
SAGE has published to meet GPL:
SageBios_PCEngines_APU_sources_for_publishing_20140405_GPL_package.tar.gz
md5sum: ce5f54723e4fe3b63a1a3e35586728d4
pcengines.apu_139_osp.tar.gz
md5sum: af6c8ab3b85d1a5a9fbeb41efa30a1ef
The patch here adds Kconfig, Makefile.inc and devicetree.cb files to
match 2014/04/05 release tarball config.h and static.c files.
Change-Id: Id61270b4d484f712a5c0e780a01fc81f1550b9ad
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8325
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/pcengines/apu1/platform_cfg.h')
| -rw-r--r-- | src/mainboard/pcengines/apu1/platform_cfg.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/mainboard/pcengines/apu1/platform_cfg.h b/src/mainboard/pcengines/apu1/platform_cfg.h index 097c835fa4..08051ec5b7 100644 --- a/src/mainboard/pcengines/apu1/platform_cfg.h +++ b/src/mainboard/pcengines/apu1/platform_cfg.h @@ -21,6 +21,9 @@ #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_ +/* APU has no legacy P/S2 controller */ +#define LEGACY_FREE 0 /* setting legacy free disables I/O access to 0x3F8 */ + /** * @def BIOS_SIZE * BIOS_SIZE_{1,2,4,8,16}M @@ -75,7 +78,7 @@ * PCI SLOT 3 define at BIT3 * PCI SLOT 4 define at BIT4 */ -#define PCI_CLOCK_CTRL 0x07 +#define PCI_CLOCK_CTRL 0x1F /** * @def SATA_CONTROLLER @@ -182,7 +185,7 @@ * GPP_CFGMODE_X2110 * GPP_CFGMODE_X1111 */ -#define GPP_CFGMODE GPP_CFGMODE_X1111 +#define GPP_CFGMODE GPP_CFGMODE_X4000 /** * @def NB_SB_GEN2 @@ -203,7 +206,7 @@ * TRUE - ports visible always, even port empty * FALSE - ports invisible if port empty */ -#define SB_GPP_UNHIDE_PORTS FALSE +#define SB_GPP_UNHIDE_PORTS TRUE /** * @def GEC_CONFIG |