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| author | Matt Papageorge <matthewpapa07@gmail.com> | 2021-05-13 15:59:57 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-21 06:35:17 +0000 |
| commit | c46bb694955ba80f054bd5770afafbbb929472f6 (patch) | |
| tree | b627535399a7341925be6a3e4e60516df9a15f1f /src/mainboard/pcengines/apu1/cmos.layout | |
| parent | 76619b01c84ba2db62310da311de4cf8271154f9 (diff) | |
mb/google/guybrush: Enable some PCIe power saving features
Enable ASPM, Common Clock and Clock Power Managment. Accomplish this
by adding the options in the platform Kconfig as well as dxio
descriptors.
BUG=b:187743927
TEST=Boot to ChromeOS and see ASPM, CC and Clock PM enabled with lspci
Change-Id: Iefc4b5b489cb8caf59f21dd4333d7af66ba47c32
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54282
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/pcengines/apu1/cmos.layout')
0 files changed, 0 insertions, 0 deletions