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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-01 23:22:55 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-07 13:57:06 +0000 |
| commit | f9decbb0c720662d8e71fe221aef55b7ecf76196 (patch) | |
| tree | 06b2198767b4c86b7d36e7ddd6a5f56b4a1fbc54 /src/mainboard/pcengines/apu1/Kconfig | |
| parent | e56f0c7cab77b89a750b4a3f7f380b1a10cd0d1d (diff) | |
mb/*/*: Remove AMD family14 boards
These boards use the LEGACY_SMP_INIT which is to be deprecated after
release 4.18.
Change-Id: I3495d140a244bbbf63e846fcd963d69907e09719
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69112
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/pcengines/apu1/Kconfig')
| -rw-r--r-- | src/mainboard/pcengines/apu1/Kconfig | 90 |
1 files changed, 0 insertions, 90 deletions
diff --git a/src/mainboard/pcengines/apu1/Kconfig b/src/mainboard/pcengines/apu1/Kconfig deleted file mode 100644 index 46f4ddec59..0000000000 --- a/src/mainboard/pcengines/apu1/Kconfig +++ /dev/null @@ -1,90 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -if BOARD_PCENGINES_APU1 - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select CPU_AMD_AGESA_FAMILY14 - select NORTHBRIDGE_AMD_AGESA_FAMILY14 - select SOUTHBRIDGE_AMD_CIMX_SB800 - select SUPERIO_NUVOTON_NCT5104D - select HAVE_PIRQ_TABLE - select HAVE_ACPI_RESUME - select HAVE_ACPI_TABLES - select HAVE_OPTION_TABLE - select HAVE_CMOS_DEFAULT - select BOARD_ROMSIZE_KB_2048 - select HAVE_SPD_IN_CBFS - select SEABIOS_ADD_SERCON_PORT_FILE if PAYLOAD_SEABIOS - select MEMORY_MAPPED_TPM - -config MAINBOARD_DIR - default "pcengines/apu1" - -config MAINBOARD_PART_NUMBER - default "apu1" - -config HW_MEM_HOLE_SIZEK - hex - default 0x200000 - -config MAX_CPUS - int - default 2 - -config IRQ_SLOT_COUNT - int - default 11 - -config ONBOARD_VGA_IS_PRIMARY - bool - default y - -config VGA_BIOS_ID - string - default "1002,9802" - -config SB800_AHCI_ROM - bool - default n - -choice - prompt "J19 pins 1-10" - default APU1_PINMUX_OFF_C - -config APU1_PINMUX_OFF_C - bool "disable" - -config APU1_PINMUX_GPIO0 - bool "GPIO" - -config APU1_PINMUX_UART_C - bool "UART 0x3e8" - -endchoice - -config UART_C_RS485 - bool "UART C drives RTS# in RS485 mode" if APU1_PINMUX_UART_C - -choice - prompt "J19 pins 11-20" - default APU1_PINMUX_OFF_D - -config APU1_PINMUX_OFF_D - bool "disable" - -config APU1_PINMUX_GPIO1 - bool "GPIO" - -config APU1_PINMUX_UART_D - bool "UART 0x2e8" - -endchoice - -config UART_D_RS485 - bool "UART D drives RTS# in RS485 mode" if APU1_PINMUX_UART_D - -config DIMM_SPD_SIZE - default 128 - -endif # BOARD_PCENGINES_APU1 |