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authorAurelien Guillaume <aurelien@iwi.me>2010-08-24 12:58:17 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-08-24 12:58:17 +0000
commit6f22ecc2c920b41f5c48d96030333d1874f67c8d (patch)
treea141a64e7834e5a5f91f4c5f249801853449ffaa /src/mainboard/pcengines/alix2d3/Kconfig
parent83628902adacc8eece332c6968ff4e910d43c5b4 (diff)
* Adds support for PC Engines Alix.2D(1)3 board to Coreboot.
* DRAM initialization done message is now printed in debug-mode only, rather than everytime. Signed-off-by: Aurelien Guillaume <aurelien@iwi.me> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5739 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/pcengines/alix2d3/Kconfig')
-rw-r--r--src/mainboard/pcengines/alix2d3/Kconfig31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/pcengines/alix2d3/Kconfig b/src/mainboard/pcengines/alix2d3/Kconfig
new file mode 100644
index 0000000000..ab6bcdad68
--- /dev/null
+++ b/src/mainboard/pcengines/alix2d3/Kconfig
@@ -0,0 +1,31 @@
+config BOARD_PCENGINES_ALIX2D3
+ bool "ALIX.2D3"
+ select ARCH_X86
+ select CPU_AMD_LX
+ select NORTHBRIDGE_AMD_LX
+ select SOUTHBRIDGE_AMD_CS5536
+ select HAVE_PIRQ_TABLE
+ select PIRQ_ROUTE
+ select UDELAY_TSC
+ select USE_DCACHE_RAM
+ select BOARD_ROMSIZE_KB_512
+
+config MAINBOARD_DIR
+ string
+ default pcengines/alix2d3
+ depends on BOARD_PCENGINES_ALIX2D3
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "ALIX.2D3"
+ depends on BOARD_PCENGINES_ALIX2D3
+
+config IRQ_SLOT_COUNT
+ int
+ default 6
+ depends on BOARD_PCENGINES_ALIX2D3
+
+config RAMBASE
+ hex
+ default 0x4000
+ depends on BOARD_PCENGINES_ALIX2D3