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authorRonald G. Minnich <rminnich@gmail.com>2007-09-08 18:32:53 +0000
committerRonald G. Minnich <rminnich@gmail.com>2007-09-08 18:32:53 +0000
commit6226f13c11ce9b8daa0d18d5c3996b984cdbd6f0 (patch)
treeabf9fa30122c8c7f9b339fc7180763c959dd20a6 /src/mainboard/pcengines/alix1c/failover.c
parent9398958cfa76635b7108d5fb2b51073b793ac2b5 (diff)
Welcome to PC Engines and the ALIX 1C!
This is a geode LX board. There are timing settings that are not right yet, we are still trying to get our board to boot Linux :-) Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/pcengines/alix1c/failover.c')
-rw-r--r--src/mainboard/pcengines/alix1c/failover.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/pcengines/alix1c/failover.c b/src/mainboard/pcengines/alix1c/failover.c
new file mode 100644
index 0000000000..bdcb9eaed2
--- /dev/null
+++ b/src/mainboard/pcengines/alix1c/failover.c
@@ -0,0 +1,32 @@
+#define ASSEMBLY 1
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include "arch/romcc_io.h"
+#include "pc80/mc146818rtc_early.c"
+
+static unsigned long main(unsigned long bist)
+{
+ /* This is the primary cpu how should I boot? */
+ if (do_normal_boot()) {
+ goto normal_image;
+ }
+ else {
+ goto fallback_image;
+ }
+ normal_image:
+ asm volatile ("jmp __normal_image"
+ : /* outputs */
+ : "a" (bist) /* inputs */
+ : /* clobbers */
+ );
+ cpu_reset:
+ asm volatile ("jmp __cpu_reset"
+ : /* outputs */
+ : "a"(bist) /* inputs */
+ : /* clobbers */
+ );
+ fallback_image:
+ return bist;
+}