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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-16 14:02:25 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-18 19:03:22 +0000
commit157b189f6b97b6e9ecd8d29edbbd045fbbc231f5 (patch)
tree4562bd212e40d0832fa893935d85a06d82f8a897 /src/mainboard/packardbell
parent146c09823333c52e8bbca98465ccc8512ec1daa2 (diff)
cpu/intel: Enter romstage without BIST
When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/packardbell')
-rw-r--r--src/mainboard/packardbell/ms2290/romstage.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c
index e2c5133c5c..a4d598f93f 100644
--- a/src/mainboard/packardbell/ms2290/romstage.c
+++ b/src/mainboard/packardbell/ms2290/romstage.c
@@ -23,7 +23,6 @@
#include <cpu/x86/lapic.h>
#include <romstage_handoff.h>
#include <console/console.h>
-#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <ec/acpi/ec.h>
#include <timestamp.h>
@@ -159,7 +158,7 @@ static inline u16 read_acpi16(u32 addr)
}
#endif
-void mainboard_romstage_entry(unsigned long bist)
+void mainboard_romstage_entry(void)
{
u32 reg32;
int s3resume = 0;
@@ -169,8 +168,7 @@ void mainboard_romstage_entry(unsigned long bist)
outb(4, 0x61);
outb(0, 0x61);
- if (bist == 0)
- enable_lapic();
+ enable_lapic();
nehalem_early_initialization(NEHALEM_MOBILE);
@@ -196,9 +194,6 @@ void mainboard_romstage_entry(unsigned long bist)
console_init();
- /* Halt if there was a built in self test failure */
- report_bist_failure(bist);
-
/* Read PM1_CNT */
reg32 = inl(DEFAULT_PMBASE + 0x04);
printk(BIOS_DEBUG, "PM1_CNT: %08x\n", reg32);