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authorFrans Hendriks <fhendriks@eltan.com>2019-04-05 13:42:14 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-04-11 11:57:55 +0000
commit1385b7dd10385e8ae58b4d988701af1eac060fd3 (patch)
tree63ef17f64c8d495228ec6e4abe30ec9a0fad7de2 /src/mainboard/packardbell
parentdd11810367e6a66fb9366d108cb0bb6b1664355a (diff)
drivers/intel/fsp1_1: Configure UART after memory init
FSP code will default enable the onboard serial port. When external serial port is used, this onboard port needs to be disabled. Add function mainboard_after_memory_init() function to perform required actions to re-enabled output to external serial port. BUG=N/A TEST=LPC Post card on Intel Cherry Hill Change-Id: Ibb6c9e4153b3de58791b211c7f4241be3bceae9d Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/28464 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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