summaryrefslogtreecommitdiff
path: root/src/mainboard/opencellular
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-02 06:12:03 +0300
committerMartin Roth <martinroth@google.com>2019-08-03 17:36:48 +0000
commitbccd2b6c492ee597d6cfebc4b6ec21ebef7252c6 (patch)
tree433d5f975a4ceb740f73851e0ea288ccee9a6bff /src/mainboard/opencellular
parentaba8fb115802df289007ae9df3269d65cfd008c5 (diff)
intel/i945,gm45,pineview,x4x: Fix stage cache location
The cache is at the end of TSEG. As SMM_RESERVED_SIZE was half of TSEG size, offseting from the start gave same position. Change-Id: I2d5df90b40ff7cd9fde3cbe3cc5090aac74825f7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/opencellular')
0 files changed, 0 insertions, 0 deletions