diff options
author | Hong Gan <hgan@fb.com> | 2016-06-24 14:04:21 -0700 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-06-26 15:20:15 +0000 |
commit | 8fb9f23d510fa6cb123936dd8076538175315d91 (patch) | |
tree | a305fb1fe7a317e7aa4c34218fbdb53d8df4a6ad /src/mainboard/opencellular/rotundu/chromeos.fmd | |
parent | 5f187dbe6344d0e3dad4277e64efaf0f0092b559 (diff) |
opencellular/rotundu: Add mainboard support
Adds Open Cellular rotundu mainboard supports.
Working:
- 2x Ethernet support
- MSATA support
- CPU init
- Memory init
- USB support
- EMMC but disabled
Not working:
- TPM support
Create directory structure and Kconfig files for OpenCellular
Rotundu and copy sources from intel/minnowmax.
Change-Id: I391d4bdd485f4bf5396c764fe3f11d98369593e4
Signed-off-by: Hong Gan <hgan@fb.com>
Signed-off-by: David Hendricks <dhendricks@fb.com>
Reviewed-on: https://review.coreboot.org/22894
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/opencellular/rotundu/chromeos.fmd')
-rw-r--r-- | src/mainboard/opencellular/rotundu/chromeos.fmd | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/opencellular/rotundu/chromeos.fmd b/src/mainboard/opencellular/rotundu/chromeos.fmd new file mode 100644 index 0000000000..913bf97291 --- /dev/null +++ b/src/mainboard/opencellular/rotundu/chromeos.fmd @@ -0,0 +1,37 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x300000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x2ff000 + } + SI_BIOS@0x300000 0x500000 { + RW_SECTION_A@0x0 0xf0000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0xc0000 + RW_FWID_A@0xeffc0 0x40 + } + RW_SECTION_B@0xf0000 0xf0000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0xc0000 + RW_FWID_B@0xeffc0 0x40 + } + RW_MRC_CACHE@0x1e0000 0x10000 + RW_ELOG@0x1f0000 0x4000 + RW_SHARED@0x1f4000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x1f8000 0x2000 + RW_UNUSED@0x1fa000 0x106000 + WP_RO@0x300000 0x200000 { + RO_VPD@0x0 0x4000 + RO_UNUSED@0x4000 0xc000 + RO_SECTION@0x10000 0x1f0000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x100000 + } + } + } +} |