diff options
| author | Philipp Deppenwiese <zaolin@das-labor.org> | 2018-08-10 16:15:14 -0700 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-09-30 03:08:22 +0000 |
| commit | 8c678cf46a2bc9716a84609615b602422a233a9e (patch) | |
| tree | 9071de3323980493c3a57fe15e413ef08dfd3ac9 /src/mainboard/opencellular/elgon/vboot.fmd | |
| parent | 7de4bb5172134fb801d0c087a84013b58b35d9d2 (diff) | |
mainboard/opencellular/elgon: Add mainboard support
Tested on Elgon EVT board and boots into GNU/Linux.
TODO:
* Add hard reset function for VBOOT.
* Add EC code
* Add SPI flash write protection
Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/28024
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/mainboard/opencellular/elgon/vboot.fmd')
| -rw-r--r-- | src/mainboard/opencellular/elgon/vboot.fmd | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/mainboard/opencellular/elgon/vboot.fmd b/src/mainboard/opencellular/elgon/vboot.fmd new file mode 100644 index 0000000000..b9a1edf329 --- /dev/null +++ b/src/mainboard/opencellular/elgon/vboot.fmd @@ -0,0 +1,30 @@ +FLASH@0x0 16M { + # must use a power of two in MiB for WP_RO + WP_RO@0x0 0x400000 { + RO_SECTION@0x0 0x3fc000 { + # 0 - 0x10000 is free for firmware usage. + # bootblock starts at 0x20000 + FMAP@0x0 0x1000 + RO_FRID@0x1000 0x100 + # bootblock includes trusted/non-trusted CLIB, CSIB, + # and BL1FWs packaged in + # src/soc/cavium/common/Makefile.inc. + BOOTBLOCK@0x10000 0x70000 + COREBOOT(CBFS)@0x80000 0x2fc000 + GBB@0x37c000 0x80000 + } + RO_VPD@0x3fc000 0x4000 + } + RW_SECTION_A@0x400000 0x5fa000 { + VBLOCK_A@0x0 0x2000 + FW_MAIN_A(CBFS)@0x2000 0x5f7f00 + RW_FWID_A@0x5f9f00 0x100 + } + RW_SECTION_B@0x9fa000 0x5fa000 { + VBLOCK_B@0x0 0x2000 + FW_MAIN_B(CBFS)@0x2000 0x5f7f00 + RW_FWID_B@0x5f9f00 0x100 + } + RW_ELOG@0xff4000 0x4000 + RW_VPD@0xff8000 0x8000 +} |