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authorRonald G. Minnich <rminnich@gmail.com>2006-09-21 20:55:58 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-09-21 20:55:58 +0000
commit984371554b8f937ce0cf068db3bf37633990fa6c (patch)
tree80c74a27c7be3b7b9f9cb59f463b8545afe01a4f /src/mainboard/olpc
parent0bece04105ce217cf9d15b44f76c2010ada5d328 (diff)
add irq for keyboard and mouse
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2432 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/olpc')
-rw-r--r--src/mainboard/olpc/rev_a/Config.lb13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/mainboard/olpc/rev_a/Config.lb b/src/mainboard/olpc/rev_a/Config.lb
index ff7fa6a3fc..022dc5250a 100644
--- a/src/mainboard/olpc/rev_a/Config.lb
+++ b/src/mainboard/olpc/rev_a/Config.lb
@@ -135,7 +135,18 @@ chip northbridge/amd/gx2
device pci 1.0 on end
device pci 1.1 on end
chip southbridge/amd/cs5536
- register "enable_gpio0_inta" = "1"
+ # 0x51400025 (IRQ Mapper LPC Mask)= 0x00001002
+ # IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK
+ # 0x5140004E (LPC Serial IRQ Control) = 0xEFFD0080.
+ # Frame Pulse Width = 4clocks
+ # IRQ Data Frames = 17Frames
+ # SIRQ Mode = continous , It would be better if the EC could operate in
+ # Active(Quiet) mode. Save power....
+ # SIRQ Enable = Enabled
+ # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK
+ register "lpc_irq" = "0x00001002"
+ register "lpc_serirq_enable" = "0xEFFD0080"
+ register "enable_gpio0_inta" = "1"
register "enable_ide_nand_flash" = "1"
register "enable_uarta" = "1"
register "enable_USBP4_host" = "1"