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| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-04-27 15:10:55 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-04-27 15:10:55 +0000 |
| commit | 3716427e7f63fd00e8117fca2027f2fe3a5bbf00 (patch) | |
| tree | 6250710970f5c19492a76378c191d2590a496fcf /src/mainboard/olpc/rev_a | |
| parent | b7a09b4f19aa5e9d23118d32e523470e590318eb (diff) | |
we don't need msr_init
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/olpc/rev_a')
| -rw-r--r-- | src/mainboard/olpc/rev_a/Config.lb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/olpc/rev_a/Config.lb b/src/mainboard/olpc/rev_a/Config.lb index a7962f51d0..8c5d98388a 100644 --- a/src/mainboard/olpc/rev_a/Config.lb +++ b/src/mainboard/olpc/rev_a/Config.lb @@ -133,6 +133,7 @@ chip northbridge/amd/gx2 device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 + register "enable_gpio0_inta" = "1" device pci d.0 on end # Realtek 8139 LAN device pci f.0 on end # ISA Bridge device pci f.2 on end # IDE Controller |