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authorJonathan Zhang <jonzhang@fb.com>2020-08-11 16:27:42 -0700
committerAngel Pons <th3fanbus@gmail.com>2020-08-14 09:08:16 +0000
commit056f81988fdbc67af334d9dfba1e974cc577fa6b (patch)
treee28f5ba8b259d1144964269a27052bdd69f70b27 /src/mainboard/ocp
parent6e36ee2544f42ef3948ec998fb9fff88bee1c452 (diff)
soc/intel/xeon_sp/cpx: remove unsupported configs
coherency_support and ats_support are not supported by CPX-SP FSP. Remove them from soc_intel_xeon_sp_cpx_config struct. Remove corresponding settings from DeltaLake devicetree.cb. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: Ibe1c4e88817fc4be7915e95fa829f0a4c0d947f2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44402 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Diffstat (limited to 'src/mainboard/ocp')
-rw-r--r--src/mainboard/ocp/deltalake/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/ocp/deltalake/devicetree.cb b/src/mainboard/ocp/deltalake/devicetree.cb
index f77a2149bd..24a2850fc9 100644
--- a/src/mainboard/ocp/deltalake/devicetree.cb
+++ b/src/mainboard/ocp/deltalake/devicetree.cb
@@ -33,9 +33,6 @@ chip soc/intel/xeon_sp/cpx
# configure PSTATE_REQ_RATIO for MSR_IA32_PERF_CTRL
register "pstate_req_ratio" = "0xa"
- register "coherency_support" = "0"
- register "ats_support" = "0"
-
register "gen1_dec" = "0x00fc0601" # BIC in-band update support
register "gen2_dec" = "0x000c0ca1" # IPMI KCS