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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-06-14 18:54:32 +0200
committerFelix Held <felix-coreboot@felixheld.de>2019-06-21 12:54:18 +0000
commitdb86a35ab686937fc4e4eb9a4f7417595bd9b519 (patch)
treeb7bd562c17a076f5c79b5755829e509a50184423 /src/mainboard/ocp/wedge100s/romstage.c
parentffbc3b5f5fb0bdf57b6d5e3808e55e761241d8ba (diff)
mb/ocp/wedge100s: Use the new IPMI driver
* Enable decoding the IPMI KCS to LPC * Select the IPMI driver * Add the PNP device that holds the IPMI KCS base address Tested on Wedge100s. Change-Id: I35634bbcbe6893bd72ec7e41f6ca7bba09d819a2 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33489 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/ocp/wedge100s/romstage.c')
-rw-r--r--src/mainboard/ocp/wedge100s/romstage.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/ocp/wedge100s/romstage.c b/src/mainboard/ocp/wedge100s/romstage.c
index 7fdc981915..108d7a1c4d 100644
--- a/src/mainboard/ocp/wedge100s/romstage.c
+++ b/src/mainboard/ocp/wedge100s/romstage.c
@@ -38,6 +38,10 @@ void early_mainboard_romstage_entry(void)
pci_write_config32(PCI_DEV(0x0, LPC_DEV, LPC_FUNC), LPC_GEN1_DEC,
(0 << 16) | ALIGN_DOWN(SUPERIO_DEV, 4) | 1);
+ /* Decode IPMI KCS */
+ pci_write_config32(PCI_DEV(0x0, LPC_DEV, LPC_FUNC), LPC_GEN2_DEC,
+ (0 << 16) | ALIGN_DOWN(0xca2, 4) | 1);
+
if (CONFIG(CONSOLE_SERIAL))
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);