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authorDavid Hendricks <dhendricks@fb.com>2017-08-10 20:43:54 -0700
committerDavid Hendricks <david.hendricks@gmail.com>2018-05-05 02:56:55 +0000
commitf3e2205dfcff93b4000dba8485b5837c7228ca6d (patch)
tree8909a0b15f62829b2db4254bf66c96b46352760c /src/mainboard/ocp/wedge100s/romstage.c
parent99d3ef85cfaa942b0302537a56d95d232e6a237b (diff)
mainboard/ocp/wedge100s: Initial commit
This patch does the following: 1. Copy src/mainboard/intel/camelbackmountain_fsp to src/mainboard/ocp/wedge100s. 2. Update Kconfig files 3. Add board.fmd 4. Enable VPD The OCP Wedge100S is a 100GbE top-of-rack switch with a Xeon D-1500 com-express module. More info is available at http://www.opencompute.org/wiki/Networking/SpecsAndDesigns. Signed-off-by: Sudhakar Mamillapalli <sudhakar@fb.com> Signed-off-by: David Hendricks <dhendricks@fb.com> Change-Id: Ia150b066124953c7c0abe8ea5a13e4131194ea00 Reviewed-on: https://review.coreboot.org/25671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/mainboard/ocp/wedge100s/romstage.c')
-rw-r--r--src/mainboard/ocp/wedge100s/romstage.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/ocp/wedge100s/romstage.c b/src/mainboard/ocp/wedge100s/romstage.c
new file mode 100644
index 0000000000..cf52c01f04
--- /dev/null
+++ b/src/mainboard/ocp/wedge100s/romstage.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <soc/romstage.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
+
+/**
+ * /brief mainboard call for setup that needs to be done before fsp init
+ *
+ */
+void early_mainboard_romstage_entry(void)
+{
+
+}
+
+/**
+ * /brief mainboard call for setup that needs to be done after fsp init
+ *
+ */
+void late_mainboard_romstage_entry(void)
+{
+
+}
+
+/**
+ * /brief customize fsp parameters here if needed
+ */
+void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
+{
+
+}