diff options
author | Johnny Lin <johnny_lin@wiwynn.com> | 2020-01-14 09:17:18 +0800 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-29 08:39:29 +0000 |
commit | dcc2eb9a935e6db83472f503815460d0fd159b52 (patch) | |
tree | e20152ee536ac0ce83fcd11b90cf888cbf7e7a28 /src/mainboard/ocp/tiogapass/romstage.c | |
parent | a9d3e652f79ba0b2036ebf8f09187adccaf5e4b3 (diff) |
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting
the timer countdown value in romstage. By default it would start the timer
and trigger hard reset when it's expired. The timer is expected to be
stopped later by payload or OS.
Add RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39690
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/ocp/tiogapass/romstage.c')
-rw-r--r-- | src/mainboard/ocp/tiogapass/romstage.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/ocp/tiogapass/romstage.c b/src/mainboard/ocp/tiogapass/romstage.c index b728c3a5c5..fb2ce0217a 100644 --- a/src/mainboard/ocp/tiogapass/romstage.c +++ b/src/mainboard/ocp/tiogapass/romstage.c @@ -2,12 +2,15 @@ #include <fsp/api.h> #include <FspmUpd.h> +#include <drivers/ipmi/ipmi_kcs.h> #include <soc/romstage.h> #include <string.h> #include <gpio.h> #include <soc/lewisburg_pch_gpio_defs.h> #include <skxsp_tp_iio.h> +#include "ipmi.h" + static uint8_t iio_table_buf[sizeof(tp_iio_bifur_table)]; static void oem_update_iio(FSPM_UPD *mupd) @@ -49,6 +52,9 @@ static void mainboard_config_iio(FSPM_UPD *mupd) void mainboard_memory_init_params(FSPM_UPD *mupd) { + /* It's better to run get BMC selftest result first */ + if (ipmi_kcs_premem_init(CONFIG_BMC_KCS_BASE, 0) == CB_SUCCESS) + init_frb2_wdt(); mainboard_config_iio(mupd); /* do not configure GPIO controller inside FSP-M */ |