aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/ocp/tiogapass/romstage.c
diff options
context:
space:
mode:
authorMaxim Polyakov <max.senia.poliak@gmail.com>2020-04-26 21:30:18 +0300
committerAndrey Petrov <andrey.petrov@gmail.com>2020-04-30 23:30:50 +0000
commit5fcfbe14818e4a4cb1111c759e183195607e0a91 (patch)
treecb270668b9087019d0d141cf23c892ab330a4ef1 /src/mainboard/ocp/tiogapass/romstage.c
parentc00f74a82c7b6eb42c0e4c3ca7604f0947cf0691 (diff)
mb/cedarisland_crb: rework GPIOs configuration using macros
This format of PCH GPIOs configuration, unlike the raw DW0 and DW1 registers values from the inteltool dump, is more understandable and makes the code much cleaner. The gpio.h file with PAD_CFG macros was automatically generated using the util/intelp2m [1] utility: ./intelp2m -p lbg -file cedarisland/vendorbios/inteltool_gpio.log According to the documentation [2], the Host Software Pad Ownership register only affects the pads that are configured as input. The intelp2m utility takes this into account when converting macros and ignores bits from this register for the corresponding pads. [1] https://review.coreboot.org/c/coreboot/+/35643 [2] Intel Document Number: 549921 Change-Id: Id671a9021a8313d8c3359b89c2934b929bcab1a4 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40736 Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/ocp/tiogapass/romstage.c')
0 files changed, 0 insertions, 0 deletions