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authorJonathan Zhang <jonzhang@fb.com>2020-10-21 15:20:50 -0700
committerMarc Jones <marc@marcjonesconsulting.com>2020-11-07 00:12:35 +0000
commit9e0dd96e7e457943629ef54b34fb14fd207069e2 (patch)
treef216ec59cb764336810b64f7352b832d4cb9e92d /src/mainboard/ocp/deltalake
parent7bfef7d50ce6e7c6e562189249a180e4e9861749 (diff)
vc/intel/FSP2_0/CPX-SP: update to ww45 release and add watermark option
Intel CPX-SP FSP ww45 release annotates default values for FSP-M UPD variables. FSPM MemRefreshWatermark option support is present in FB's CPX-SP FSP binary, but not in Intel's CPX-SP FSP binary. In FB's CPX-SP FSP binary, this option takes the space of UnusedUpdSpace0[0]. For DeltaLake mainboard, if corresponding VPD variable is set, use it to control the behavior. Such control is effective when FB's CPX-SP FSP binary is used. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I57ad01f33b92bf61a6a2725dd1cdbbc99c02405d Reviewed-on: https://review.coreboot.org/c/coreboot/+/46640 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Christian Walter <christian.walter@9elements.com>
Diffstat (limited to 'src/mainboard/ocp/deltalake')
-rw-r--r--src/mainboard/ocp/deltalake/romstage.c16
-rw-r--r--src/mainboard/ocp/deltalake/vpd.h4
2 files changed, 20 insertions, 0 deletions
diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c
index 71a26c8789..f0cdd3dbb7 100644
--- a/src/mainboard/ocp/deltalake/romstage.c
+++ b/src/mainboard/ocp/deltalake/romstage.c
@@ -59,6 +59,22 @@ static void mainboard_config_upd(FSPM_UPD *mupd)
"DciEn to %d\n", FSP_DCI, FSP_DCI_DEFAULT);
mupd->FspmConfig.PchDciEn = FSP_DCI_DEFAULT;
}
+
+ /*
+ * UnusedUpdSpace0[0] is reserved for Memory Refresh Watermark.
+ * Following code is effective when MemRefreshWaterMark patch is added to FSP
+ * and when corresponding VPD variable is set.
+ */
+ if (vpd_gets(FSPM_MEMREFRESHWATERMARK, val_str, VPD_LEN, VPD_RW_THEN_RO)) {
+ val = (uint8_t)atol(val_str);
+ if (val > 2) {
+ printk(BIOS_DEBUG, "Invalid MemRefreshWatermark value from VPD: "
+ "%d\n", val);
+ val = FSPM_MEMREFRESHWATERMARK_DEFAULT;
+ }
+ printk(BIOS_DEBUG, "Setting MemRefreshWatermark %d from VPD\n", val);
+ mupd->FspmConfig.UnusedUpdSpace0[0] = val;
+ }
}
/* Update bifurcation settings according to different Configs */
diff --git a/src/mainboard/ocp/deltalake/vpd.h b/src/mainboard/ocp/deltalake/vpd.h
index 43070c2a16..71a3b09202 100644
--- a/src/mainboard/ocp/deltalake/vpd.h
+++ b/src/mainboard/ocp/deltalake/vpd.h
@@ -36,4 +36,8 @@
#define COREBOOT_LOG_LEVEL "coreboot_log_level"
#define COREBOOT_LOG_LEVEL_DEFAULT 4
+/* FSPM MemRefreshWatermark: 0:Auto, 1: high(default), 2: low */
+#define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark"
+#define FSPM_MEMREFRESHWATERMARK_DEFAULT 1
+
#endif