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author | Johnny Lin <johnny_lin@wiwynn.com> | 2020-05-12 10:05:27 +0800 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2020-07-04 11:15:23 +0000 |
commit | 407b35aa9f5e243acbcc37e72e128c2fe241ef1d (patch) | |
tree | 86e09fbcac12b446b5ed46bf567b710810a3736e /src/mainboard/ocp/deltalake/ramstage.c | |
parent | 54a7f41de181de72f622c1e0ca7cea89829257a2 (diff) |
mb/ocp/deltalake: Populate SMBIOS data and set the read PPIN to BMC
1. Populate SMBIOS data from OCP_DMI driver read from FRU and PPIN MSR
for OEM string 1 to 6, add string 8 for PCIE configuration.
2. Set the read PPIN MSR to BMC.
Tested on OCP Delta Lake.
Change-Id: I9127cf5da1c56d8012694d070615aec24cc22fdf
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41279
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/ocp/deltalake/ramstage.c')
-rw-r--r-- | src/mainboard/ocp/deltalake/ramstage.c | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index c4da628709..a8f92ad04a 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -1,7 +1,72 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <console/console.h> +#include <drivers/ipmi/ipmi_ops.h> +#include <drivers/ocp/dmi/ocp_dmi.h> #include <soc/ramstage.h> +#include "ipmi.h" + +extern struct fru_info_str fru_strings; + +static void dl_oem_smbios_strings(struct device *dev, struct smbios_type11 *t) +{ + uint8_t pcie_config = 0; + + /* OEM string 1 to 6 */ + ocp_oem_smbios_strings(dev, t); + + /* TODO: Add real OEM string 7, add TBF for now */ + t->count = smbios_add_oem_string(t->eos, TBF); + + /* Add OEM string 8 */ + if (ipmi_get_pcie_config(&pcie_config) == CB_SUCCESS) { + switch (pcie_config) { + case PCIE_CONFIG_UNKNOWN: + t->count = smbios_add_oem_string(t->eos, "0x0: Unknown"); + break; + case PCIE_CONFIG_A: + t->count = smbios_add_oem_string(t->eos, "0x1: YV3 Config-A"); + break; + case PCIE_CONFIG_B: + t->count = smbios_add_oem_string(t->eos, "0x2: YV3 Config-B"); + break; + case PCIE_CONFIG_C: + t->count = smbios_add_oem_string(t->eos, "0x3: YV3 Config-C"); + break; + case PCIE_CONFIG_D: + t->count = smbios_add_oem_string(t->eos, "0x4: YV3 Config-D"); + break; + default: + t->count = smbios_add_oem_string(t->eos, "Check BMC return data"); + } + } else { + printk(BIOS_ERR, "Failed to get IPMI PCIe config\n"); + } +} + +static void mainboard_enable(struct device *dev) +{ + dev->ops->get_smbios_strings = dl_oem_smbios_strings, + read_fru_areas(CONFIG_BMC_KCS_BASE, CONFIG_FRU_DEVICE_ID, 0, &fru_strings); +} + void mainboard_silicon_init_params(FSPS_UPD *params) { } + +static void mainboard_final(void *chip_info) +{ + struct ppin_req req = {0}; + + req.cpu0_lo = xeon_sp_ppin[0].lo; + req.cpu0_hi = xeon_sp_ppin[0].hi; + /* Set PPIN to BMC */ + if (ipmi_set_ppin(&req) != CB_SUCCESS) + printk(BIOS_ERR, "ipmi_set_ppin failed\n"); +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, + .final = mainboard_final, +}; |