diff options
author | Marc Bertens <mbertens@xs4all.nl> | 2011-01-06 23:03:46 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2011-01-06 23:03:46 +0000 |
commit | 965c43b4db8df752a2db609fef01c7235291c144 (patch) | |
tree | 2a20ba9d05595d152031c643e2e3f9310455f03e /src/mainboard/nokia/ip530/devicetree.cb | |
parent | 69436e1a8ccf50d67004f74360f3ff5e6a146b9a (diff) |
Various Nokia IP530 fixes.
- Correct default ROM image size for this board (512KB is correct).
- devicetree.cb: Add AUX I/O config (mainly GPIO settings).
This allows you to control the LEDs in the front panel and JP900/JP901
can be read.
- irq_tables.c: Rework PIRQ table to make more onboard devices work.
Also, avoid IRQ9.
- mainboard.c: Drop unneeded functions, everything is done in devicetree.cb.
Signed-off-by: Marc Bertens <mbertens@xs4all.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6247 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/nokia/ip530/devicetree.cb')
-rw-r--r-- | src/mainboard/nokia/ip530/devicetree.cb | 53 |
1 files changed, 49 insertions, 4 deletions
diff --git a/src/mainboard/nokia/ip530/devicetree.cb b/src/mainboard/nokia/ip530/devicetree.cb index 673e0cb10d..3cfbc8fb0f 100644 --- a/src/mainboard/nokia/ip530/devicetree.cb +++ b/src/mainboard/nokia/ip530/devicetree.cb @@ -40,10 +40,55 @@ chip northbridge/intel/i440bx # Northbridge io 0x60 = 0x2f8 irq 0x70 = 3 end - device pnp 3f0.6 on end # RTC - device pnp 3f0.7 off end # PS/2 keyboard / mouse (No connector) - device pnp 3f0.8 on end # AUX I/O - device pnp 3f0.a off end # ACPI (No support yet) + device pnp 3f0.6 on # RTC + irq 0x63 = 0x72 + end + device pnp 3f0.7 off # PS/2 keyboard / mouse (No connector) + end + device pnp 3f0.8 on # AUX I/O + irq 0x24 = 0x84 # OSC + + irq 0xB2 = 0x0C # Soft power status 1 + irq 0xB3 = 0x05 # Soft power status 2 + irq 0xC0 = 0x03 # IRQ MUX control + + irq 0xC8 = 0x10 # GP50 = (I/O) output = Flashrom enable + irq 0xCA = 0x09 # GP52 = IRQ8 (output) + irq 0xCB = 0x01 # GP53 = nROMCS (output) + irq 0xCC = 0x11 # GP54 = (I/O) input + irq 0xF9 = 0x00 # read/write GP5x lines (0x1C) + + irq 0xD0 = 0x08 # GP60 = IRQ1 + irq 0xD1 = 0x08 # GP61 = IRQ3 + irq 0xD2 = 0x08 # GP62 = IRQ4 + irq 0xD3 = 0x11 # GP63 = (I/O) input = JP901 on board + irq 0xD4 = 0x11 # GP64 = (I/O) input + irq 0xD5 = 0x11 # GP65 = (I/O) input + irq 0xD6 = 0x08 # GP66 = IRQ8 + irq 0xD7 = 0x11 # GP67 = (I/O) input + irq 0xFA = 0x00 # read/write GP6x lines (0x88) + + irq 0xE0 = 0x00 # GP10 (I/O) = output + irq 0xE1 = 0x01 # GP11 (I/O) = input + irq 0xE2 = 0x08 # GP12 = P17 + irq 0xE3 = 0x00 # GP13 (I/O) = output = LED fault on front, active low + irq 0xE4 = 0x00 # GP14 (I/O) = output + irq 0xE5 = 0x00 # GP15 (I/O) = output + irq 0xE6 = 0x01 # GP16 (I/O) = input = JP900 on board, low on short, high on open + irq 0xE7 = 0x00 # GP17 (I/O) = output = LED alert on front, active low + irq 0xF6 = 0xFF # read/write GP1x lines (0xCA) + + irq 0xEF = 0x00 # GP_INT2 disable + irq 0xF0 = 0x00 # GP_INT1 disable + irq 0xF1 = 0x00 # WDT_UNITS + irq 0xF2 = 0x00 # WDT_VAL + irq 0xF3 = 0x00 # WDT_CFG + irq 0xF4 = 0x20 # WDT_CTRL (stop-cnt) + end + device pnp 3f0.a off # ACPI (No support yet) + # irq 0x60 = 0x0C + # irq 0x61 = 0x80 + end end end device pci 7.1 on end # IDE |