aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/msi
diff options
context:
space:
mode:
authorMichał Żygowski <michal.zygowski@3mdeb.com>2022-05-04 15:46:16 +0200
committerMichał Żygowski <michal.zygowski@3mdeb.com>2022-07-11 08:59:51 +0000
commitffec028b5478a354f538916f2780990f6fbd20ad (patch)
tree08ebc8001f4df91e05e315cf4335bb6c1b8a0f13 /src/mainboard/msi
parentee52f23936188774d75318e215257ba63c7a464d (diff)
mainboard/msi/ms7d25: Add FIVR configuration
Reflect the vendor's firmware FIVR settings. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I97b3b4f9470267961c138fea70703606373f6d52 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64051 Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r--src/mainboard/msi/ms7d25/devicetree.cb7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb
index ba144f8dcd..a8860ae6e1 100644
--- a/src/mainboard/msi/ms7d25/devicetree.cb
+++ b/src/mainboard/msi/ms7d25/devicetree.cb
@@ -84,6 +84,13 @@ chip soc/intel/alderlake
register "hybrid_storage_mode" = "1"
register "dmi_power_optimize_disable" = "1"
+ # FIVR configuration
+ register "fivr_rfi_frequency" = "1394"
+ register "fivr_spread_spectrum" = "FIVR_SS_1_5"
+ register "ext_fivr_settings" = "{
+ .configure_ext_fivr = 1,
+ }"
+
device domain 0 on
subsystemid 0x1462 0x7d25 inherit
device ref pcie5_0 on