This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and

makes include/console/console.h and console/console.c usable both in
__PRE_RAM__ and coreboot_ram stages.

While debugging this, I removed an indirection from the e7520 ram init code
(same as we did on a couple of other chipsets, removes some register pressure
  from romcc)

Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code 
		in cache_as_ram.inc)

Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with
CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

10 files changed, 11 insertions, 13 deletions

diff --git a/src/mainboard/msi/ms6119/romstage.c b/src/mainboard/msi/ms6119/romstage.c
index f061cb5460..2bf27e3e8d 100644
--- a/src/mainboard/msi/ms6119/romstage.c
+++ b/src/mainboard/msi/ms6119/romstage.c
@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
diff --git a/src/mainboard/msi/ms6147/romstage.c b/src/mainboard/msi/ms6147/romstage.c
index b250994939..2a6dce7beb 100644
--- a/src/mainboard/msi/ms6147/romstage.c
+++ b/src/mainboard/msi/ms6147/romstage.c
@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
diff --git a/src/mainboard/msi/ms6156/romstage.c b/src/mainboard/msi/ms6156/romstage.c
index e5a6bf9fe4..71f5de1325 100644
--- a/src/mainboard/msi/ms6156/romstage.c
+++ b/src/mainboard/msi/ms6156/romstage.c
@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
diff --git a/src/mainboard/msi/ms6178/romstage.c b/src/mainboard/msi/ms6178/romstage.c
index 4a558eba6c..a1096a4011 100644
--- a/src/mainboard/msi/ms6178/romstage.c
+++ b/src/mainboard/msi/ms6178/romstage.c
@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "northbridge/intel/i82810/raminit.h"
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 80f217c363..2a6c6f368b 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -51,7 +51,7 @@
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "southbridge/nvidia/ck804/ck804_early_smbus.c"
diff --git a/src/mainboard/msi/ms7260/ap_romstage.c b/src/mainboard/msi/ms7260/ap_romstage.c
index 84ba6c1daf..f8ac2fec3a 100644
--- a/src/mainboard/msi/ms7260/ap_romstage.c
+++ b/src/mainboard/msi/ms7260/ap_romstage.c
@@ -39,10 +39,8 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-#include "arch/i386/lib/console.c"
+
+#include "console/console.c"
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index 9016075fb9..7e97a27e53 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -56,7 +56,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index cf625e5561..350980e5d2 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -50,7 +50,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 
 #if 0
 static void post_code(uint8_t value) {
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index 270924392a..24a307eff6 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -45,7 +45,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index e11b4382e5..622dfd1058 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -46,7 +46,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"