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authorVenkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>2016-09-08 16:11:27 -0700
committerMartin Roth <martinroth@google.com>2016-09-12 19:49:28 +0200
commitd2e92e461db62cc8c22de5ac6925b5fdf864c0ed (patch)
tree08075ebbc985c784fca234f1e07b20a1aabb1192 /src/mainboard/msi
parent6584973bdc2ae57311f4a20041975bfac34d0d59 (diff)
mainboard/google/reef: Enable lpss s0ix
This setting enables lpss to power gate in S0ix. BUG=chrome-os-partner:53876 Change-Id: I0a0fecb0e2b6e5e2f89ac505dd603f4be1bc161e Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com> Reviewed-on: https://review.coreboot.org/16558 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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