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authorPaul Menzel <paulepanter@users.sourceforge.net>2013-10-18 09:42:55 +0200
committerJonathan A. Kollasch <jakllsch@kollasch.net>2013-10-18 17:44:56 +0200
commit6a4e9b547a0e73fb48ee228357820fb3ba85cec2 (patch)
tree36f5602238822afed6f08967eba787c1d2853556 /src/mainboard/msi
parentcd9abf95e7fe3d67f02e5e0197efa2688db83d22 (diff)
get_bus_conf.c: reindent with indent
Change-Id: Ia0c37339aa69b92a1b518fa5e49adc4a7628ae5d Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3979 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r--src/mainboard/msi/ms9185/get_bus_conf.c139
-rw-r--r--src/mainboard/msi/ms9282/get_bus_conf.c104
2 files changed, 124 insertions, 119 deletions
diff --git a/src/mainboard/msi/ms9185/get_bus_conf.c b/src/mainboard/msi/ms9185/get_bus_conf.c
index 7ed8600385..3a70d838dc 100644
--- a/src/mainboard/msi/ms9185/get_bus_conf.c
+++ b/src/mainboard/msi/ms9185/get_bus_conf.c
@@ -38,11 +38,10 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
struct mb_sysconf_t mb_sysconf;
-static unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+static unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -50,10 +49,10 @@ static unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-static unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
- 0x20202020,
- 0x20202020,
+
+static unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
+ 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -62,73 +61,77 @@ static unsigned hcdnx[] =
// 0x20202020,
};
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
{
- unsigned apicid_base;
-
- device_t dev;
- int i;
- struct mb_sysconf_t *m;
-
- if(get_bus_conf_done==1) return; //do it only once
-
- get_bus_conf_done = 1;
-
- sysconf.mb = &mb_sysconf;
-
- m = sysconf.mb;
-
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
-
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
-
- get_sblk_pci1234();
-
- sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
- m->sbdn2 = sysconf.hcdn[0] & 0xff; // bcm5780
-
- m->bus_bcm5785_0 = (sysconf.pci1234[0] >> 16) & 0xff;
- m->bus_bcm5780[0] = m->bus_bcm5785_0;
-
- /* bcm5785 */
- dev = dev_find_slot(m->bus_bcm5785_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- m->bus_bcm5785_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- dev = dev_find_slot(m->bus_bcm5785_1, PCI_DEVFN(0xd,0));
- if(dev) {
- m->bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_bcm5785_0, sysconf.sbdn);
- }
-
- /* bcm5780 */
- for(i = 1; i < 7; i++) {
- dev = dev_find_slot(m->bus_bcm5780[0], PCI_DEVFN(m->sbdn2 + i - 1,0));
- if(dev) {
- m->bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_bcm5780[0], m->sbdn2+i-1);
- }
- }
-
+ unsigned apicid_base;
+
+ device_t dev;
+ int i;
+ struct mb_sysconf_t *m;
+
+ if (get_bus_conf_done == 1)
+ return; //do it only once
+
+ get_bus_conf_done = 1;
+
+ sysconf.mb = &mb_sysconf;
+
+ m = sysconf.mb;
+
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
+
+ get_sblk_pci1234();
+
+ sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
+ m->sbdn2 = sysconf.hcdn[0] & 0xff; // bcm5780
+
+ m->bus_bcm5785_0 = (sysconf.pci1234[0] >> 16) & 0xff;
+ m->bus_bcm5780[0] = m->bus_bcm5785_0;
+
+ /* bcm5785 */
+ dev = dev_find_slot(m->bus_bcm5785_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ m->bus_bcm5785_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ dev = dev_find_slot(m->bus_bcm5785_1, PCI_DEVFN(0xd, 0));
+ if (dev) {
+ m->bus_bcm5785_1_1 =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ }
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_bcm5785_0, sysconf.sbdn);
+ }
+
+ /* bcm5780 */
+ for (i = 1; i < 7; i++) {
+ dev =
+ dev_find_slot(m->bus_bcm5780[0],
+ PCI_DEVFN(m->sbdn2 + i - 1, 0));
+ if (dev) {
+ m->bus_bcm5780[i] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_bcm5780[0], m->sbdn2 + i - 1);
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
- apicid_base = get_apicid_base(3);
+ apicid_base = get_apicid_base(3);
#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
+ apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- for(i=0;i<3;i++)
- m->apicid_bcm5785[i] = apicid_base+i;
+ for (i = 0; i < 3; i++)
+ m->apicid_bcm5785[i] = apicid_base + i;
}
diff --git a/src/mainboard/msi/ms9282/get_bus_conf.c b/src/mainboard/msi/ms9282/get_bus_conf.c
index 091840f69c..4ab124d5fc 100644
--- a/src/mainboard/msi/ms9282/get_bus_conf.c
+++ b/src/mainboard/msi/ms9282/get_bus_conf.c
@@ -39,23 +39,22 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
struct mb_sysconf_t mb_sysconf;
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
- 0x20202020,
- 0x20202020,
- 0x20202020,
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
+ 0x20202020,
+ 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -63,66 +62,69 @@ unsigned hcdnx[] =
// 0x20202020,
};
-
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
{
- unsigned apicid_base;
- struct mb_sysconf_t *m;
+ unsigned apicid_base;
+ struct mb_sysconf_t *m;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.mb = &mb_sysconf;
+ sysconf.mb = &mb_sysconf;
- m = sysconf.mb;
- memset(m, 0, sizeof(struct mb_sysconf_t));
+ m = sysconf.mb;
+ memset(m, 0, sizeof(struct mb_sysconf_t));
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
- m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
+ m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- /* MCP55 */
- dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06,0));
- if (dev) {
- m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
- }
+ /* MCP55 */
+ dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06, 0));
+ if (dev) {
+ m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sysconf.sbdn + 0x06);
+ }
- for(i=2; i<8;i++) {
- dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0));
- if (dev) {
- m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
- }
- }
+ for (i = 2; i < 8; i++) {
+ dev =
+ dev_find_slot(m->bus_mcp55[0],
+ PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2, 0));
+ if (dev) {
+ m->bus_mcp55[i] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2);
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
- apicid_base = get_apicid_base(1);
+ apicid_base = get_apicid_base(1);
#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
+ apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- m->apicid_mcp55 = apicid_base+0;
+ m->apicid_mcp55 = apicid_base + 0;
}