diff options
| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-07 15:30:58 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-07 15:30:58 +0000 |
| commit | 66b74047d60133fbae6a2ab35452fbd6c666e9b1 (patch) | |
| tree | 63a7c90d7e8254bac149c1783581c570e2ca1b43 /src/mainboard/msi/ms9185/Kconfig | |
| parent | 31f81a6de1515df2eebcf6e1b1afd545fc7a2714 (diff) | |
Kconfig:
- Add AMD Socket 754,
- Fix MCP55 boards (romstrap)
- Implement remaining MSI boards
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4732 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/msi/ms9185/Kconfig')
| -rw-r--r-- | src/mainboard/msi/ms9185/Kconfig | 123 |
1 files changed, 123 insertions, 0 deletions
diff --git a/src/mainboard/msi/ms9185/Kconfig b/src/mainboard/msi/ms9185/Kconfig new file mode 100644 index 0000000000..ab440ba2e7 --- /dev/null +++ b/src/mainboard/msi/ms9185/Kconfig @@ -0,0 +1,123 @@ +config BOARD_MSI_MS9185 + bool "MS9185" + select ARCH_X86 + select CPU_AMD_K8 + select CPU_AMD_SOCKET_F + select NORTHBRIDGE_AMD_AMDK8 + select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX + select SOUTHBRIDGE_BROADCOM_BCM5780 + select SOUTHBRIDGE_BROADCOM_BCM5785 + select SUPERIO_NSC_PC87417 + select HAVE_PIRQ_TABLE + select USE_PRINTK_IN_CAR + select USE_DCACHE_RAM + +config MAINBOARD_DIR + string + default msi/ms9185 + depends on BOARD_MSI_MS9185 + +config DCACHE_RAM_BASE + hex + default 0xcc000 + depends on BOARD_MSI_MS9185 + +config DCACHE_RAM_SIZE + hex + default 0x04000 + depends on BOARD_MSI_MS9185 + +config DCACHE_RAM_GLOBAL_VAR_SIZE + hex + default 0x01000 + depends on BOARD_MSI_MS9185 + +config APIC_ID_OFFSET + hex + default 0x10 + depends on BOARD_MSI_MS9185 + +config HAVE_HARD_RESET + bool + default y + depends on BOARD_MSI_MS9185 + +config IOAPIC + bool + default y + depends on BOARD_MSI_MS9185 + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_MSI_MS9185 + +config SB_HT_CHAIN_UNITID_OFFSET_ONLY + bool + default n + depends on BOARD_MSI_MS9185 + +config LB_CKS_RANGE_END + int + default 122 + depends on BOARD_MSI_MS9185 + +config LB_CKS_LOC + int + default 123 + depends on BOARD_MSI_MS9185 + +config MAINBOARD_PART_NUMBER + string + default "ultra40" + depends on BOARD_MSI_MS9185 + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + depends on BOARD_MSI_MS9185 + +config MAX_CPUS + int + default 4 + depends on BOARD_MSI_MS9185 + +config MAX_PHYSICAL_CPUS + int + default 2 + depends on BOARD_MSI_MS9185 + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x0 + depends on BOARD_MSI_MS9185 + +config HT_CHAIN_UNITID_BASE + hex + default 0x0 + depends on BOARD_MSI_MS9185 + +config USE_INIT + bool + default n + depends on BOARD_MSI_MS9185 + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_MSI_MS9185 + +config CONSOLE_VGA + bool + default y + depends on BOARD_MSI_MS9185 + +config PCI_ROM_RUN + bool + default y + depends on BOARD_MSI_MS9185 + +config IRQ_SLOT_COUNT + int + default 11 + depends on BOARD_MSI_MS9185 |