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authorMichał Żygowski <michal.zygowski@3mdeb.com>2022-04-07 15:16:46 +0200
committerMichał Żygowski <michal.zygowski@3mdeb.com>2022-07-07 07:39:21 +0000
commit90989b321091a3b7828628304c7cf4bffcc7aed0 (patch)
tree86d8c4b654738c9faeacc5b4e15595499d602c37 /src/mainboard/msi/ms7d25/devicetree.cb
parent1ff6125af74899dad390efa45aefa665f6cc76e9 (diff)
mainboard/msi/ms7d25: Add early support for MSI PRO Z690-A DDR4 WIFI
Initial mainboard code MSI PRO Z690-A DDR4 WIFI. The platform boots up up to romstage where it returns from FSP memory init with an error. What works: - open-source CAR setup - NCT6687D serial port with TX pin exposed on JBD1 header - SMBus reading SPD from all 4 DIMMs This board will serve as a reference board for enabling Alder Lake-S support in coreboot. More code and functionalities will be added in subsequent patches as src/soc/alderlake code will be improved for PCH-S. TEST=Extract the microcode from vendor firmware and include it in the build. The platform should print the console on the serial port even without FSP blob. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I5df69822dbb3ff79e087408a0693de37df2142e8 Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com> Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63463 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'src/mainboard/msi/ms7d25/devicetree.cb')
-rw-r--r--src/mainboard/msi/ms7d25/devicetree.cb28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb
new file mode 100644
index 0000000000..dccaa253ae
--- /dev/null
+++ b/src/mainboard/msi/ms7d25/devicetree.cb
@@ -0,0 +1,28 @@
+chip soc/intel/alderlake
+ device domain 0 on
+ device ref igpu on end
+ device ref crashlog off end
+ device ref xhci on end
+ device ref heci1 on end
+ device ref heci2 off end
+ device ref ide_r off end
+ device ref kt off end
+ device ref heci3 off end
+ device ref heci4 off end
+ device ref sata on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end
+ device ref pcie_rp3 on end
+ device ref pcie_rp4 on end
+ device ref pcie_rp5 on end
+ device ref pcie_rp6 on end
+ device ref pcie_rp7 on end
+ device ref pcie_rp8 on end
+ device ref pcie_rp9 on end
+ device ref pcie_rp10 on end
+ device ref pcie_rp11 on end
+ device ref p2sb on end
+ device ref hda on end
+ device ref smbus on end
+ end
+end