newconfig is no more.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 0 insertions, 476 deletions

diff --git a/src/mainboard/msi/ms7260/Config.lb b/src/mainboard/msi/ms7260/Config.lb
deleted file mode 100644
index f420731f42..0000000000
--- a/src/mainboard/msi/ms7260/Config.lb
+++ /dev/null
@@ -1,288 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
-## CONFIG_XIP_ROM_SIZE must be a power of 2.
-default CONFIG_XIP_ROM_SIZE = 64 * 1024
-include /config/failovercalculation.lb
-
-arch i386 end
-
-driver mainboard.o
-object get_bus_conf.o # Needed by irq_tables and mptable (and acpi_tables).
-if CONFIG_GENERATE_MP_TABLE object mptable.o end
-if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
-
-  if CONFIG_USE_INIT
-    makerule ./cache_as_ram_auto.o
-      depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
-      action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
-    end
-  else
-    makerule ./cache_as_ram_auto.inc
-      depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
-      action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
-      action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
-      action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
-    end
-  end
-
-if CONFIG_USE_FAILOVER_IMAGE
-else
-  if CONFIG_AP_CODE_IN_CAR
-    makerule ./apc_auto.o
-      depends "$(CONFIG_MAINBOARD)/apc_auto.c option_table.h"
-      action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/apc_auto.c -o $@"
-    end
-    ldscript /arch/i386/init/ldscript_apc.lb
-  end
-end
-
-if CONFIG_HAVE_FAILOVER_BOOT
-  if CONFIG_USE_FAILOVER_IMAGE
-    mainboardinit cpu/x86/16bit/entry16.inc
-    ldscript /cpu/x86/16bit/entry16.lds
-  end
-else
-  if CONFIG_USE_FALLBACK_IMAGE
-    mainboardinit cpu/x86/16bit/entry16.inc
-    ldscript /cpu/x86/16bit/entry16.lds
-  end
-end
-
-mainboardinit cpu/x86/32bit/entry32.inc
-
-  if CONFIG_USE_INIT
-    ldscript /cpu/x86/32bit/entry32.lds
-  end
-  if CONFIG_USE_INIT
-    ldscript /cpu/amd/car/cache_as_ram.lds
-  end
-
-if CONFIG_HAVE_FAILOVER_BOOT
-  if CONFIG_USE_FAILOVER_IMAGE
-    mainboardinit cpu/x86/16bit/reset16.inc
-    ldscript /cpu/x86/16bit/reset16.lds
-  else
-    mainboardinit cpu/x86/32bit/reset32.inc
-    ldscript /cpu/x86/32bit/reset32.lds
-  end
-else
-  if CONFIG_USE_FALLBACK_IMAGE
-    mainboardinit cpu/x86/16bit/reset16.inc
-    ldscript /cpu/x86/16bit/reset16.lds
-  else
-    mainboardinit cpu/x86/32bit/reset32.inc
-    ldscript /cpu/x86/32bit/reset32.lds
-  end
-end
-
-mainboardinit arch/i386/lib/id.inc
-ldscript /arch/i386/lib/id.lds
-
-# ROMSTRAP table for MCP55.
-if CONFIG_HAVE_FAILOVER_BOOT
-  if CONFIG_USE_FAILOVER_IMAGE
-    mainboardinit southbridge/nvidia/mcp55/romstrap.inc
-    ldscript /southbridge/nvidia/mcp55/romstrap.lds
-  end
-else
-  if CONFIG_USE_FALLBACK_IMAGE
-    mainboardinit southbridge/nvidia/mcp55/romstrap.inc
-    ldscript /southbridge/nvidia/mcp55/romstrap.lds
-  end
-end
-
-  mainboardinit cpu/amd/car/cache_as_ram.inc
-
-if CONFIG_HAVE_FAILOVER_BOOT
-  if CONFIG_USE_FAILOVER_IMAGE
-      ldscript /arch/i386/lib/failover_failover.lds
-  end
-else
-  if CONFIG_USE_FALLBACK_IMAGE
-      ldscript /arch/i386/lib/failover.lds
-  end
-end
-
-  if CONFIG_USE_INIT
-    initobject cache_as_ram_auto.o
-  else
-    mainboardinit ./cache_as_ram_auto.inc
-  end
-
-config chip.h
-
-chip northbridge/amd/amdk8/root_complex		# Root complex
-  device apic_cluster 0 on			# APIC cluster
-    chip cpu/amd/socket_AM2			# CPU
-      device apic 0 on end			# APIC
-    end
-  end
-  device pci_domain 0 on			# PCI domain
-    chip northbridge/amd/amdk8			# Northbridge / mc0
-      device pci 18.0 on
-        # Devices on link 0, link 0 == LDT 0
-        chip southbridge/nvidia/mcp55		# Southbridge
-          device pci 0.0 on end			# HT
-          device pci 1.0 on			# LPC
-            chip superio/winbond/w83627ehg	# Super I/O
-              device pnp 4e.0 on		# Floppy
-                io 0x60 = 0x3f0
-                irq 0x70 = 6
-                drq 0x74 = 2
-              end
-              device pnp 4e.1 on		# Parallel port
-                io 0x60 = 0x378
-                irq 0x70 = 7
-              end
-              device pnp 4e.2 on		# Com1
-                io 0x60 = 0x3f8
-                irq 0x70 = 4
-              end
-              device pnp 4e.3 on		# Com2 / IrDA
-                io 0x60 = 0x2f8
-                irq 0x70 = 3
-              end
-              device pnp 4e.5 on		# PS/2 keyboard
-                io 0x60 = 0x60
-                io 0x62 = 0x64
-                irq 0x70 = 1			# PS/2 keyboard IRQ
-                irq 0x72 = 12			# PS/2 mouse IRQ
-              end
-              device pnp 4e.6 off		# Serial flash interface
-                # io 0x62 = 0x100
-              end
-              device pnp 4e.7 off		# GPIO1/6, game port, MIDI port
-                # io 0x60 = 0x220		# Datasheet: 0x201
-                # io 0x62 = 0x300		# Datasheet: 0x330
-                # irq 0x70 = 9
-              end
-              device pnp 4e.8 off		# WDTO#, PLED
-              end
-              device pnp 4e.9 off		# GPIO2/3/4/5, SUSLED
-              end
-              device pnp 4e.a off		# ACPI
-              end
-              device pnp 4e.b on		# HWM (for lm-sensors)
-                io 0x60 = 0xa10
-              end
-            end
-          end
-          device pci 1.1 on			# SM 0
-            chip drivers/generic/generic	# DIMM 0-0-0
-              device i2c 50 on end
-            end
-            chip drivers/generic/generic	# DIMM 0-0-1
-              device i2c 51 on end
-            end
-            chip drivers/generic/generic	# DIMM 0-1-0
-              device i2c 52 on end
-            end
-            chip drivers/generic/generic	# DIMM 0-1-1
-              device i2c 53 on end
-            end
-            # TODO: Needed?
-            # chip drivers/generic/generic	# DIMM 1-0-0
-            #   device i2c 54 on end
-            # end
-            # chip drivers/generic/generic	# DIMM 1-0-1
-            #   device i2c 55 on end
-            # end
-            # chip drivers/generic/generic	# DIMM 1-1-0
-            #   device i2c 56 on end
-            # end
-            # chip drivers/generic/generic	# DIMM 1-1-1
-            #   device i2c 57 on end
-            # end
-          end
-          # TODO: Check if the stuff below is correct / needed.
-          device pci 1.1 on			# SM 1
-            # PCI device SMBus address will depend on addon PCI device,
-            # do we need to scan_smbus_bus?
-
-            # chip drivers/generic/generic	# PCIXA Slot1
-            #   device i2c 50 on end
-            # end
-            # chip drivers/generic/generic	# PCIXB Slot1
-            #   device i2c 51 on end
-            # end
-            # chip drivers/generic/generic	# PCIXB Slot2
-            #   device i2c 52 on end
-            # end
-            # chip drivers/generic/generic	# PCI Slot1
-            #   device i2c 53 on end
-            # end
-            # chip drivers/generic/generic	# Master MCP55 PCI-E
-            #   device i2c 54 on end
-            # end
-            # chip drivers/generic/generic	# Slave MCP55 PCI-E
-            #   device i2c 55 on end
-            # end
-            chip drivers/generic/generic	# MAC EEPROM
-              device i2c 51 on end
-            end
-          end
-          device pci 2.0 on end			# USB 1.1
-          device pci 2.1 on end			# USB 2
-          device pci 4.0 on end			# IDE
-          device pci 5.0 on end			# SATA 0
-          device pci 5.1 on end			# SATA 1
-          device pci 5.2 off end		# SATA 2 (N/A on this board)
-          device pci 6.0 on end			# PCI
-          device pci 6.1 on end			# AZA (HD Audio)
-          device pci 8.0 on end			# NIC
-          device pci 9.0 off end		# NIC (N/A on this board)
-          device pci a.0 off end		# PCI E 5 (N/A on this board?)
-          device pci b.0 on end			# PCI E 4
-          device pci c.0 on end			# PCI E 3
-          device pci d.0 on end			# PCI E 2
-          device pci e.0 on end			# PCI E 1
-          device pci f.0 on end			# PCI E 0
-          register "ide0_enable" = "1"
-          register "sata0_enable" = "1"
-          register "sata1_enable" = "1"
-          # TODO: Check the two lines below.
-          register "mac_eeprom_smbus" = "3"	# 1: SMBus under 2e.8, 2: SM0 3: SM1
-          register "mac_eeprom_addr" = "0x51"
-        end
-      end
-      device pci 18.0 on end			# Link 1
-      device pci 18.0 on end
-      device pci 18.1 on end
-      device pci 18.2 on end
-      device pci 18.3 on end
-    end
-  end
-
-# TODO
-#  chip drivers/generic/debug
-#    device pnp 0.0 off end			# chip name
-#    device pnp 0.1 on end			# pci_regs_all
-#    device pnp 0.2 on end			# mem
-#    device pnp 0.3 off end			# cpuid
-#    device pnp 0.4 on end			# smbus_regs_all
-#    device pnp 0.5 off end			# dual core msr
-#    device pnp 0.6 off end			# cache size
-#    device pnp 0.7 off end			# tsc
-#    device pnp 0.8 off end			# io
-#    device pnp 0.9 off end			# io
-#  end
-
-end
diff --git a/src/mainboard/msi/ms7260/Options.lb b/src/mainboard/msi/ms7260/Options.lb
deleted file mode 100644
index 1be372ae6c..0000000000
--- a/src/mainboard/msi/ms7260/Options.lb
+++ /dev/null
@@ -1,188 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
-uses CONFIG_GENERATE_MP_TABLE
-uses CONFIG_GENERATE_PIRQ_TABLE
-uses CONFIG_USE_FALLBACK_IMAGE
-uses CONFIG_USE_FAILOVER_IMAGE
-uses CONFIG_HAVE_FALLBACK_BOOT
-uses CONFIG_HAVE_FAILOVER_BOOT
-uses CONFIG_HAVE_HARD_RESET
-uses CONFIG_IRQ_SLOT_COUNT
-uses CONFIG_HAVE_OPTION_TABLE
-uses CONFIG_MAX_CPUS
-uses CONFIG_MAX_PHYSICAL_CPUS
-uses CONFIG_LOGICAL_CPUS
-uses CONFIG_IOAPIC
-uses CONFIG_SMP
-uses CONFIG_FALLBACK_SIZE
-uses CONFIG_FAILOVER_SIZE
-uses CONFIG_ROM_SIZE
-uses CONFIG_ROM_SECTION_SIZE
-uses CONFIG_ROM_IMAGE_SIZE
-uses CONFIG_ROM_SECTION_SIZE
-uses CONFIG_ROM_SECTION_OFFSET
-uses CONFIG_ROM_PAYLOAD
-uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
-uses CONFIG_COMPRESSED_PAYLOAD_LZMA
-uses CONFIG_PRECOMPRESSED_PAYLOAD
-uses CONFIG_ROMBASE
-uses CONFIG_XIP_ROM_SIZE
-uses CONFIG_XIP_ROM_BASE
-uses CONFIG_STACK_SIZE
-uses CONFIG_HEAP_SIZE
-uses CONFIG_USE_OPTION_TABLE
-uses CONFIG_LB_CKS_RANGE_START
-uses CONFIG_LB_CKS_RANGE_END
-uses CONFIG_LB_CKS_LOC
-uses CONFIG_MAINBOARD_PART_NUMBER
-uses CONFIG_MAINBOARD_VENDOR
-uses CONFIG_MAINBOARD
-uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
-uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
-uses COREBOOT_EXTRA_VERSION
-uses CONFIG_RAMBASE
-uses CONFIG_TTYS0_BAUD
-uses CONFIG_TTYS0_BASE
-uses CONFIG_TTYS0_LCS
-uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
-uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
-uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-uses CONFIG_CONSOLE_SERIAL8250
-uses CONFIG_HAVE_INIT_TIMER			# ?
-uses CONFIG_CROSS_COMPILE
-uses CC
-uses HOSTCC
-uses CONFIG_OBJCOPY
-uses CONFIG_CONSOLE_VGA
-uses CONFIG_PCI_ROM_RUN
-uses CONFIG_USBDEBUG_DIRECT
-uses CONFIG_HW_MEM_HOLE_SIZEK
-uses CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC
-uses CONFIG_K8_HT_FREQ_1G_SUPPORT
-uses CONFIG_HT_CHAIN_UNITID_BASE
-uses CONFIG_HT_CHAIN_END_UNITID_BASE
-uses CONFIG_SB_HT_CHAIN_ON_BUS0
-uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
-uses CONFIG_USE_DCACHE_RAM
-uses CONFIG_DCACHE_RAM_BASE
-uses CONFIG_DCACHE_RAM_SIZE
-uses CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE
-uses CONFIG_USE_INIT
-uses CONFIG_SERIAL_CPU_INIT
-uses CONFIG_ENABLE_APIC_EXT_ID
-uses CONFIG_APIC_ID_OFFSET
-uses CONFIG_LIFT_BSP_APIC_ID
-uses CONFIG_PCI_64BIT_PREF_MEM
-uses CONFIG_RAMTOP
-uses CONFIG_AP_CODE_IN_CAR
-uses CONFIG_MEM_TRAIN_SEQ
-uses CONFIG_WAIT_BEFORE_CPUS_INIT
-uses CONFIG_USE_PRINTK_IN_CAR
-uses CONFIG_ID_SECTION_OFFSET
-
-default CONFIG_ROM_SIZE = 512 * 1024
-default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
-default CONFIG_FAILOVER_SIZE = 4 * 1024
-default CONFIG_RAMTOP = 2048*1024	# 1MB more for pgtbl.
-default CONFIG_HAVE_FALLBACK_BOOT = 1
-default CONFIG_HAVE_FAILOVER_BOOT = 1
-default CONFIG_HAVE_HARD_RESET = 1
-default CONFIG_GENERATE_PIRQ_TABLE = 1
-default CONFIG_IRQ_SLOT_COUNT = 11		# TODO: Check if correct.
-default CONFIG_GENERATE_MP_TABLE = 1		# TODO: Check if correct.
-default CONFIG_HAVE_OPTION_TABLE = 1
-default CONFIG_SMP = 1
-default CONFIG_MAX_CPUS = 2
-default CONFIG_MAX_PHYSICAL_CPUS = 1
-default CONFIG_LOGICAL_CPUS = 1
-# default CONFIG_SERIAL_CPU_INIT = 0
-default CONFIG_ENABLE_APIC_EXT_ID = 0
-default CONFIG_APIC_ID_OFFSET = 0x10
-default CONFIG_LIFT_BSP_APIC_ID = 1
-
-# Move the default coreboot CMOS range off of AMD RTC registers.
-default CONFIG_LB_CKS_RANGE_START = 49
-default CONFIG_LB_CKS_RANGE_END = 122
-default CONFIG_LB_CKS_LOC = 123
-
-# Memory hole size. 0 means disable, others will enable the hole. In that
-# case, if it is smaller than mmio_basek, it will use mmio_basek instead.
-# default CONFIG_HW_MEM_HOLE_SIZEK = 0x200000	# 2GB
-default CONFIG_HW_MEM_HOLE_SIZEK = 0x100000	# 1GB
-# default CONFIG_HW_MEM_HOLE_SIZEK = 0x80000	# 512MB
-
-# Make auto increase hole size to avoid hole_startk equal to basek so as
-# to make some kernel happy.
-# default CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 1
-
-# Opteron K8 1G HT support.
-default CONFIG_K8_HT_FREQ_1G_SUPPORT = 1
-
-# HT Unit ID offset, default is 1, the typical one, 0 means only one HT device.
-default CONFIG_HT_CHAIN_UNITID_BASE = 0
-
-# Real SB Unit ID, default is 0x20, mean don't touch it at last.
-# default CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-
-# Make the SB HT chain on bus 0, default is not (0).
-default CONFIG_SB_HT_CHAIN_ON_BUS0 = 2
-
-# Only offset for SB chain? Default is yes (1).
-default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0
-
-# Allow capable device use that above 4GB.
-# default CONFIG_PCI_64BIT_PREF_MEM = 1
-
-default CONFIG_CONSOLE_VGA = 1		# Needed for VGA.
-default CONFIG_PCI_ROM_RUN = 1		# Needed for VGA.
-default CONFIG_USBDEBUG_DIRECT = 0
-default CONFIG_USE_DCACHE_RAM = 1
-default CONFIG_DCACHE_RAM_BASE = 0xc8000
-default CONFIG_DCACHE_RAM_SIZE = 0x08000
-default CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x01000
-default CONFIG_USE_INIT = 0
-default CONFIG_AP_CODE_IN_CAR = 0
-default CONFIG_MEM_TRAIN_SEQ = 2
-default CONFIG_WAIT_BEFORE_CPUS_INIT = 0
-default CONFIG_IOAPIC = 1
-default CONFIG_MAINBOARD_PART_NUMBER = "K9N Neo (MS-7260)"
-default CONFIG_MAINBOARD_VENDOR = "MSI"
-default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1462
-default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x7260
-default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE
-default CONFIG_STACK_SIZE = 0x2000
-default CONFIG_HEAP_SIZE = 0x8000
-default CONFIG_USE_OPTION_TABLE = (!CONFIG_USE_FALLBACK_IMAGE) && (!CONFIG_USE_FAILOVER_IMAGE)
-default CONFIG_RAMBASE = 0x00100000
-default CONFIG_ROM_PAYLOAD = 1
-default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32"
-default HOSTCC = "gcc"
-default CONFIG_USE_PRINTK_IN_CAR = 1
-default CONFIG_CONSOLE_SERIAL8250 = 1
-default CONFIG_TTYS0_BAUD = 115200
-default CONFIG_TTYS0_BASE = 0x3f8
-default CONFIG_TTYS0_LCS = 0x3
-default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
-default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
-default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
-default CONFIG_ID_SECTION_OFFSET=0x80
-
-end