diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-24 00:04:22 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-31 03:41:11 +0000 |
commit | 1740230ace3aeede3a7ee5cadd1e17744cda07b3 (patch) | |
tree | bf4e9f45d71fef44056ba901ac91fcbfb423a525 /src/mainboard/msi/ms7135/mptable.c | |
parent | f054a4bf3d6ce459d15c9375e4ca2390d04ffb68 (diff) |
Remove all AMD K8 boards
Platforms with LATE_CBMEM_INIT were agreed to be
removed with 4.7 release late 2017.
Change-Id: I0ecbb40f8c7ebdf68217f50af5624905d9005c64
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/msi/ms7135/mptable.c')
-rw-r--r-- | src/mainboard/msi/ms7135/mptable.c | 156 |
1 files changed, 0 insertions, 156 deletions
diff --git a/src/mainboard/msi/ms7135/mptable.c b/src/mainboard/msi/ms7135/mptable.c deleted file mode 100644 index 35dc02c482..0000000000 --- a/src/mainboard/msi/ms7135/mptable.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 AMD - * (Written by Yinghai Lu <yinghailu@amd.com> for AMD) - * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de> - * (Thanks to LSRA University of Mannheim for their support) - * Copyright (C) 2008 Jonathan A. Kollasch <jakllsch@kollasch.net> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <console/console.h> -#include <arch/smp/mpspec.h> -#include <device/pci.h> -#include <string.h> -#include <stdint.h> -#include <cpu/amd/amdk8_sysconf.h> - -extern unsigned char bus_ck804[6]; -extern unsigned apicid_ck804; - -static void *smp_write_config_table(void *v) -{ - struct mp_config_table *mc; - int bus_isa; - unsigned sbdn; - - get_bus_conf(); - sbdn = sysconf.sbdn; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - mptable_write_buses(mc, NULL, &bus_isa); - -/* I/O APICs: APIC ID Version State Address*/ - { - struct device *dev; - struct resource *res; - u32 dword; - - dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + 0x1, 0)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_1); - if (res) { - smp_write_ioapic(mc, apicid_ck804, 0x11, - res2mmio(res, 0, 0)); - } - - /* Initialize interrupt mapping */ - - /* copied from stock bios */ - /*0x01800500,0x1800d509,0x00520d08*/ - - dword = 0x08d0d218; - pci_write_config32(dev, 0x7c, dword); - - dword = 0x8d001509; - pci_write_config32(dev, 0x80, dword); - - dword = 0x00010271; - pci_write_config32(dev, 0x84, dword); - - } - } - - /* Now, assemble the table. */ - mptable_add_isa_interrupts(mc, bus_isa, apicid_ck804, 0); - -#define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, \ - bus_ck804[bus], (((dev)<<2)|(fn)), apicid_ck804, (pin)) - -#if 0 - // Onboard ck804 smbus - PCI_INT(0, sbdn+1, 1, 10); /* (this seems odd, how to test?) */ - -#endif - // Onboard ck804 USB - PCI_INT(0, sbdn+2, 0, 23); - PCI_INT(0, sbdn+2, 1, 23); - - // Onboard ck804 AC-97 - PCI_INT(0, sbdn+4, 0, 23); - - // Onboard ck804 SATA 0 - PCI_INT(0, sbdn+7, 0, 20); - - // Onboard ck804 SATA 1 - PCI_INT(0, sbdn+8, 0, 21); - - // Onboard ck804 NIC - PCI_INT(0, sbdn+10, 0, 22); - - - /* "AGR" slot */ - PCI_INT(1, 0, 0, 16); - PCI_INT(1, 0, 1, 17); - - /* legacy PCI */ - PCI_INT(1, 7, 0, 17); - PCI_INT(1, 7, 1, 18); - PCI_INT(1, 7, 2, 19); - PCI_INT(1, 7, 3, 16); - - PCI_INT(1, 8, 0, 18); - PCI_INT(1, 8, 1, 19); - PCI_INT(1, 8, 2, 16); - PCI_INT(1, 8, 3, 17); - - PCI_INT(1, 9, 0, 19); - PCI_INT(1, 9, 1, 16); - PCI_INT(1, 9, 2, 17); - PCI_INT(1, 9, 3, 18); - - - /* PCI-E x1 port */ - PCI_INT(2, 0, 0, 19); - /* XXX guesses */ - PCI_INT(2, 0, 1, 16); - PCI_INT(2, 0, 2, 17); - PCI_INT(2, 0, 3, 18); - - /* PCI-E x16 port */ /* XXX fix me ? */ - PCI_INT(3, 0, 0, 18); - /* XXX guesses */ - PCI_INT(3, 0, 1, 19); - PCI_INT(3, 0, 2, 16); - PCI_INT(3, 0, 3, 17); - -/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ - mptable_lintsrc(mc, bus_ck804[0]); - - /* There is no extension information... */ - - /* Compute the checksums */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} |