aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/msi/h81m-p33/dsdt.asl
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-05-12 01:36:30 +0200
committerAngel Pons <th3fanbus@gmail.com>2021-02-12 19:39:25 +0000
commit3b0a4899d8ded1ee9bec1d431d91f431291e3eb0 (patch)
tree501f2a13d603716383d5ccee99f3d4cf7ca950b0 /src/mainboard/msi/h81m-p33/dsdt.asl
parent11235d68750ff2274e21571210f95c018a295a36 (diff)
mb/msi/h81m-p33: Add new mainboard
This is a µATX mainboard with a LGA1150 socket and two DDR3 DIMM slots. Working: - Both DIMM slots - Serial port to emit spam - Some USB ports - Integrated graphics (libgfxinit) - DVI - Realtek GbE - All PCIe ports - At least one SATA port - RAM initialization with MRC binary - Flashing with flashrom - S3 suspend/resume - VBT - SeaBIOS 1.14 to boot Arch Linux (kernel linux-5.10.15.arch1-1) Broken: - Audio. It doesn't work on stock firmware either. I suspect the codec hardware on my board is dead. Untested: - PS/2 mouse - EHCI debug - Front USB headers - Non-Linux OSes - TPM header - VGA Change-Id: I9e47747a99c65e488487fbbcac1de15b9bf5c235 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41260 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/msi/h81m-p33/dsdt.asl')
-rw-r--r--src/mainboard/msi/h81m-p33/dsdt.asl26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/mainboard/msi/h81m-p33/dsdt.asl b/src/mainboard/msi/h81m-p33/dsdt.asl
new file mode 100644
index 0000000000..9c5594531b
--- /dev/null
+++ b/src/mainboard/msi/h81m-p33/dsdt.asl
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ 0x02, /* DSDT revision: ACPI 2.0 and up */
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20141018 /* OEM revision */
+)
+{
+ #include <acpi/dsdt_top.asl>
+ #include "acpi/platform.asl"
+ #include <southbridge/intel/common/acpi/platform.asl>
+ #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
+ #include <cpu/intel/common/acpi/cpu.asl>
+
+ Device (\_SB.PCI0)
+ {
+ #include <northbridge/intel/haswell/acpi/hostbridge.asl>
+ #include <southbridge/intel/lynxpoint/acpi/pch.asl>
+ }
+}