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authorEric Biederman <ebiederm@xmission.com>2004-11-05 10:48:04 +0000
committerEric Biederman <ebiederm@xmission.com>2004-11-05 10:48:04 +0000
commit709850a21b1bdfb0018aa2a7ee06a7407bbd465c (patch)
tree9aa0549858c03180139a7d528e5cb21982eff1ba /src/mainboard/motorola
parentd0805e0b55e63957b3641fa70cf1db624389e3f6 (diff)
- Ensure every copy of Options.lb uses:
CROSS_COMPILE CC HOSTCC OBJCOPY git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/motorola')
-rw-r--r--src/mainboard/motorola/sandpoint/Config.lb23
-rw-r--r--src/mainboard/motorola/sandpoint/Options.lb27
2 files changed, 27 insertions, 23 deletions
diff --git a/src/mainboard/motorola/sandpoint/Config.lb b/src/mainboard/motorola/sandpoint/Config.lb
index 711ddb2da8..f33ce4bede 100644
--- a/src/mainboard/motorola/sandpoint/Config.lb
+++ b/src/mainboard/motorola/sandpoint/Config.lb
@@ -2,29 +2,6 @@
## Config file for the Motorola Sandpoint III development system.
## Note that this has only been tested with the Altimus 7410 PMC.
##
-uses CONFIG_SANDPOINT_ALTIMUS
-uses CONFIG_SANDPOINT_TALUS
-uses CONFIG_SANDPOINT_UNITY
-uses CONFIG_SANDPOINT_VALIS
-uses CONFIG_SANDPOINT_GYRUS
-uses ISA_IO_BASE
-uses ISA_MEM_BASE
-uses PCIC0_CFGADDR
-uses PCIC0_CFGDATA
-uses PNP_CFGADDR
-uses PNP_CFGDATA
-uses _IO_BASE
-
-##
-## Set memory map
-##
-default ISA_IO_BASE=0xfe000000
-default ISA_MEM_BASE=0xfd000000
-default PCIC0_CFGADDR=0xfec00000
-default PCIC0_CFGDATA=0xfee00000
-default PNP_CFGADDR=0x15c
-default PNP_CFGDATA=0x15d
-default _IO_BASE=ISA_IO_BASE
##
## Early board initialization, called from ppc_main()
diff --git a/src/mainboard/motorola/sandpoint/Options.lb b/src/mainboard/motorola/sandpoint/Options.lb
new file mode 100644
index 0000000000..5ca5007883
--- /dev/null
+++ b/src/mainboard/motorola/sandpoint/Options.lb
@@ -0,0 +1,27 @@
+uses CONFIG_SANDPOINT_ALTIMUS
+uses CONFIG_SANDPOINT_TALUS
+uses CONFIG_SANDPOINT_UNITY
+uses CONFIG_SANDPOINT_VALIS
+uses CONFIG_SANDPOINT_GYRUS
+uses ISA_IO_BASE
+uses ISA_MEM_BASE
+uses PCIC0_CFGADDR
+uses PCIC0_CFGDATA
+uses PNP_CFGADDR
+uses PNP_CFGDATA
+uses _IO_BASE
+uses CROSS_COMPILE
+uses CC
+uses HOSTCC
+uses OBJCOPY
+
+##
+## Set memory map
+##
+default ISA_IO_BASE=0xfe000000
+default ISA_MEM_BASE=0xfd000000
+default PCIC0_CFGADDR=0xfec00000
+default PCIC0_CFGDATA=0xfee00000
+default PNP_CFGADDR=0x15c
+default PNP_CFGDATA=0x15d
+default _IO_BASE=ISA_IO_BASE