Intel i82810 boards & chips: Remove - using LATE_CBMEM_INIT

All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.

If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.

chips:
northbridge/intel/i82810

Mainboards:
src/mainboard/asus/mew-am
src/mainboard/asus/mew-vm
src/mainboard/ecs/p6iwp-fe
src/mainboard/hp/e_vectra_p2706t
src/mainboard/intel/d810e2cb
src/mainboard/mitac/6513wu
src/mainboard/msi/ms6178
src/mainboard/nec/powermate2000

Change-Id: Ib273316c59f499e6cd3a0e4c4dc4c2cce94ff291
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/23300
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

6 files changed, 0 insertions, 227 deletions

diff --git a/src/mainboard/mitac/6513wu/Kconfig b/src/mainboard/mitac/6513wu/Kconfig
deleted file mode 100644
index 0266016aad..0000000000
--- a/src/mainboard/mitac/6513wu/Kconfig
+++ /dev/null
@@ -1,38 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_MITAC_6513WU
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SOCKET_PGA370
-	select NORTHBRIDGE_INTEL_I82810
-	select SOUTHBRIDGE_INTEL_I82801AX
-	select SUPERIO_SMSC_SMSCSUPERIO
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_512
-
-config MAINBOARD_DIR
-	string
-	default mitac/6513wu
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "6513WU"
-
-config IRQ_SLOT_COUNT
-	int
-	default 8
-
-endif # BOARD_MITAC_6513WU
diff --git a/src/mainboard/mitac/6513wu/Kconfig.name b/src/mainboard/mitac/6513wu/Kconfig.name
deleted file mode 100644
index bee249ac20..0000000000
--- a/src/mainboard/mitac/6513wu/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_MITAC_6513WU
-	bool "6513WU"
diff --git a/src/mainboard/mitac/6513wu/board_info.txt b/src/mainboard/mitac/6513wu/board_info.txt
deleted file mode 100644
index 3364212a51..0000000000
--- a/src/mainboard/mitac/6513wu/board_info.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-Category: desktop
-Board URL: http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm
-ROM package: PLCC
-Flashrom support: y
diff --git a/src/mainboard/mitac/6513wu/devicetree.cb b/src/mainboard/mitac/6513wu/devicetree.cb
deleted file mode 100644
index 8d99df7239..0000000000
--- a/src/mainboard/mitac/6513wu/devicetree.cb
+++ /dev/null
@@ -1,80 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Michael Gold <mgold@ncf.ca>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-chip northbridge/intel/i82810           # Northbridge
-  device cpu_cluster 0 on              # APIC cluster
-    chip cpu/intel/socket_PGA370        # CPU
-      device lapic 0 on end              # APIC
-    end
-  end
-  device domain 0 on                # PCI domain
-    device pci 0.0 on end               # Graphics Memory Controller Hub (GMCH)
-    device pci 1.0 on end
-    chip southbridge/intel/i82801ax     # Southbridge
-      register "pirqa_routing" = "0x03"
-      register "pirqb_routing" = "0x05"
-      register "pirqc_routing" = "0x09"
-      register "pirqd_routing" = "0x0b"
-
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-
-      device pci 1e.0 on                # PCI bridge
-        device pci 5.0 on end           # Audio controller (ESS ES1988)
-      end
-      device pci 1f.0 on                # ISA bridge
-        chip superio/smsc/smscsuperio   # Super I/O (SMSC LPC47U332)
-          device pnp 4e.0 on            # Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 4e.3 on            # Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-            drq 0x74 = 3
-          end
-          device pnp 4e.4 on            # COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 4e.5 on            # MIDI port (MPU-401)
-            io 0x60 = 0x330
-            irq 0x70 = 10
-          end
-          device pnp 4e.7 on            # PS/2 keyboard / mouse
-            io 0x60 = 0x60              # XXX: not relocatable
-            io 0x62 = 0x64              # XXX: not relocatable
-            irq 0x70 = 1                # PS/2 keyboard interrupt
-            irq 0x72 = 12               # PS/2 mouse interrupt
-          end
-          device pnp 4e.9 on            # Game port
-            io 0x60 = 0x201
-          end
-          device pnp 4e.a on            # Runtime registers
-            io 0x60 = 0x400
-          end
-          device pnp 4e.b off end       # SMBus
-        end
-      end
-      device pci 1f.1 on end            # IDE
-      device pci 1f.2 on end            # USB
-      device pci 1f.3 on end            # SMbus
-      device pci 1f.5 off end           # Audio controller
-      device pci 1f.6 off end           # Modem
-    end
-  end
-end
diff --git a/src/mainboard/mitac/6513wu/irq_tables.c b/src/mainboard/mitac/6513wu/irq_tables.c
deleted file mode 100644
index 52979bb3bf..0000000000
--- a/src/mainboard/mitac/6513wu/irq_tables.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Michael Gold <mgold@ncf.ca>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-/*
- * Each of PIRQA..D can be routed to IRQ 3-7, 9-12, 14, or 15; but the
- * selected IRQs can't be shared with ISA devices (Intel DS 290655-003,
- * section 5.7.6).
- *
- * Correspondingly, the IRQs used on the Super I/O (4,6,7,10,12) are
- * excluded from the masks, leaving 0xca28 (3,5,9,11,14,15).
- */
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,         /* u32 signature */
-	PIRQ_VERSION,           /* u16 version */
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,                   /* Interrupt router bus */
-	(0x1f << 3) | 0x0,      /* Interrupt router dev */
-	0,                      /* IRQs devoted exclusively to PCI usage */
-	0x8086,                 /* Vendor */
-	0x7000,                 /* Device */
-	0,                      /* Miniport */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xb6,                   /* Checksum (has to be set to some value that
-	                         * would give 0 after the sum of all bytes
-	                         * for this structure (including checksum).
-	                         */
-	{
-		/* bus,        dev | fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
-		{0x00, (0x1f << 3) | 0x0, {{0x00, 0x0000}, {0x61, 0xca28}, {0x00, 0x0000}, {0x63, 0xca28}}, 0x0, 0x0},
-		{0x00, (0x1e << 3) | 0x0, {{0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}}, 0x0, 0x0},
-		{0x00, (0x01 << 3) | 0x0, {{0x60, 0xca28}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
-		{0x01, (0x05 << 3) | 0x0, {{0x63, 0xca28}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
-		{0x01, (0x08 << 3) | 0x0, {{0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}}, 0x1, 0x0},
-		{0x01, (0x09 << 3) | 0x0, {{0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}, {0x60, 0xca28}}, 0x2, 0x0},
-		{0x01, (0x0a << 3) | 0x0, {{0x62, 0xca28}, {0x63, 0xca28}, {0x60, 0xca28}, {0x61, 0xca28}}, 0x3, 0x0},
-		{0x01, (0x0b << 3) | 0x0, {{0x63, 0xca28}, {0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}}, 0x4, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/mitac/6513wu/romstage.c b/src/mainboard/mitac/6513wu/romstage.c
deleted file mode 100644
index 66989d9f20..0000000000
--- a/src/mainboard/mitac/6513wu/romstage.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Michael Gold <mgold@ncf.ca>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82801ax/i82801ax.h>
-#include <northbridge/intel/i82810/raminit.h>
-#include <delay.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/smsc/smscsuperio/smscsuperio.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-
-	report_bist_failure(bist);
-	enable_smbus();
-	dump_spd_registers();
-	sdram_set_registers();
-	sdram_set_spd_registers();
-	sdram_enable();
-}