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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2016-11-05 18:31:33 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2016-11-17 23:08:43 +0100 |
commit | 5a043fe08d84490356888d236ee7d190aa195217 (patch) | |
tree | 80b062db6bc068d06917afbbe0d3410b191b15d2 /src/mainboard/lowrisc/nexys4ddr | |
parent | 05abe4351b1d76148a8cc69f817e659fa372a5dd (diff) |
rtc: Check update-in-progress bit
While the real-time clock updates its count, values may not be correctly
read or written. On reads, ensure the UIP bit is clear which guarantees
a minimum of 244 microseconds exists before the update begins. Writes
already avoid the problem by disabling the RTC count via the SET bit.
Change-Id: I39e34493113015d32582f1c280fafa9e97f43a40
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/17369
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/lowrisc/nexys4ddr')
0 files changed, 0 insertions, 0 deletions