FrontRunner/Toucan-AF: Use SPD read code from F14 wrapper

Changes:
 - Get rid of the LiPPERT FrontRunner-AF and Toucan-AF mainboard
   specific code and use the platform generic function wrapper that
   was added in change
   http://review.coreboot.org/#/c/2497/
   AMD f14: Add SPD read functions to wrapper code

 - Move DIMM addresses into devicetree.cb

 - Add the ASF init that used to be in the SPD read code into
   mainboard_enable()

Notes:
 - The DIMM reads only happen in romstage, so the function is not
   available in ramstage.  Point the read-SPD callback to a generic
   function in ramstage.

Change-Id: I4ee5e1bc34f4caee20615c48248d4f7605c09377
Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-on: http://review.coreboot.org/2874
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

1 files changed, 7 insertions, 0 deletions

diff --git a/src/mainboard/lippert/toucan-af/devicetree.cb b/src/mainboard/lippert/toucan-af/devicetree.cb
index fbe2a2caf1..d110c3a09f 100644
--- a/src/mainboard/lippert/toucan-af/devicetree.cb
+++ b/src/mainboard/lippert/toucan-af/devicetree.cb
@@ -104,6 +104,13 @@ chip northbridge/amd/agesa/family14/root_complex
 			device pci 18.5 on end
 			device pci 18.6 on end
 			device pci 18.7 on end
+
+			register "spdAddrLookup" = "
+			{
+				{ {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
+				{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
+			}"
+
 		end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
 	end #domain
 end #northbridge/amd/agesa/family14/root_complex