diff options
| author | Warren Turkal <wt@penguintechs.org> | 2010-09-27 21:18:26 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-09-27 21:18:26 +0000 |
| commit | e0afe735a0fa0564a9ab082593c60f56c291493a (patch) | |
| tree | ab01ea91c8cdcdec898cc50afd4954284d7f7eb0 /src/mainboard/lippert/literunner-lx | |
| parent | 768d8ea09830a02fe815b8b60825430a3ec6a10a (diff) | |
All these boards already had the CACHE_AS_RAM option in their individual
configs. I just moved it the the CPU that they all use.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/lippert/literunner-lx')
| -rw-r--r-- | src/mainboard/lippert/literunner-lx/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/lippert/literunner-lx/Kconfig b/src/mainboard/lippert/literunner-lx/Kconfig index 4f4b28902c..482f571e8d 100644 --- a/src/mainboard/lippert/literunner-lx/Kconfig +++ b/src/mainboard/lippert/literunner-lx/Kconfig @@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select CACHE_AS_RAM # Board is equipped with a 1 MB SPI flash, however, due to limitations # of the IT8712F Super I/O, only the top 512 KB are directly mapped. select BOARD_ROMSIZE_KB_512 |