add cpureginit to romcc code.

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 5 insertions, 4 deletions

diff --git a/src/mainboard/lippert/frontrunner/auto.c b/src/mainboard/lippert/frontrunner/auto.c
index a4843023b1..47c0565bdd 100644
--- a/src/mainboard/lippert/frontrunner/auto.c
+++ b/src/mainboard/lippert/frontrunner/auto.c
@@ -47,7 +47,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 #define PLLMSRlo1 ((0xde << 16) | (1 << 26) | (1 << 24))
 #define PLLMSRlo2 ((1<<14) |(1<<13) | (1<<0))
 #include "northbridge/amd/gx2/pll_reset.c"
-
+#include "cpu/amd/model_gx2/cpureginit.c"
 
 static void msr_init(void)
 {
@@ -92,9 +92,10 @@ static void main(unsigned long bist)
 	print_err("done cs5535 early\n");
 	pll_reset();
 	print_err("done pll_reset\n");
-	/* Halt if there was a built in self test failure */
-	//report_bist_failure(bist);
-	
+
+	cpuRegInit();
+	print_err("done cpuRegInit\n");
+
 	sdram_initialize(1, memctrl);
 
 	print_err("Done sdram_initialize\n");