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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-17 10:56:26 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-23 15:52:09 +0000
commita342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch)
tree4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/mainboard/lenovo
parent9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff)
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/g505s/BiosCallOuts.c2
-rw-r--r--src/mainboard/lenovo/g505s/buildOpts.c6
-rw-r--r--src/mainboard/lenovo/t430s/romstage.c2
-rw-r--r--src/mainboard/lenovo/t60/romstage.c2
-rw-r--r--src/mainboard/lenovo/t60/smihandler.c2
-rw-r--r--src/mainboard/lenovo/x60/dock.c2
-rw-r--r--src/mainboard/lenovo/z61t/romstage.c2
-rw-r--r--src/mainboard/lenovo/z61t/smihandler.c2
8 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/lenovo/g505s/BiosCallOuts.c b/src/mainboard/lenovo/g505s/BiosCallOuts.c
index a82ddf9f0b..201198d629 100644
--- a/src/mainboard/lenovo/g505s/BiosCallOuts.c
+++ b/src/mainboard/lenovo/g505s/BiosCallOuts.c
@@ -112,7 +112,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
FchParams->Imc.ImcEnable = TRUE;
FchParams->Hwm.HwmControl = 1; /* 1 IMC, 0 HWM */
- FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC , 1 enable IMC, 0 following hw strap setting */
+ FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC, 1 enable IMC, 0 following hw strap setting */
LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), FchParams->StdHeader);
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 9ef46d5708..3eaa8b07fb 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -365,9 +365,9 @@ GPIO_CONTROL lenovo_g505s_gpio[] = {
#define SCI_MAP_PWRBTN 0x73
SCI_MAP_CONTROL lenovo_g505s_sci_map[] = {
- {GEVENT_PIN( EC_SCI_GEVENT ), EC_SCI_GPE},
- {GEVENT_PIN( EC_LID_GEVENT ), EC_LID_GPE},
- {GEVENT_PIN( PCIE_GEVENT ), PCIE_GPE},
+ {GEVENT_PIN(EC_SCI_GEVENT), EC_SCI_GPE},
+ {GEVENT_PIN(EC_LID_GEVENT), EC_LID_GPE},
+ {GEVENT_PIN(PCIE_GEVENT), PCIE_GPE},
{SCI_MAP_OHCI_12_0, PME_GPE},
{SCI_MAP_OHCI_13_0, PME_GPE},
{SCI_MAP_XHCI_10_0, PME_GPE},
diff --git a/src/mainboard/lenovo/t430s/romstage.c b/src/mainboard/lenovo/t430s/romstage.c
index b409b5e59b..203044e312 100644
--- a/src/mainboard/lenovo/t430s/romstage.c
+++ b/src/mainboard/lenovo/t430s/romstage.c
@@ -43,7 +43,7 @@ void mainboard_rcba_config(void)
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
- { 1, 0, 0 }, /* P0: , OC 0 */
+ { 1, 0, 0 }, /* P0:, OC 0 */
{ 1, 1, 1 }, /* P1: (EHCI debug), OC 1 */
{ 1, 1, 3 }, /* P2: OC 3 */
{ 1, 0, -1 }, /* P3: no OC */
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index e4a8efb608..3d4baa5355 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -183,7 +183,7 @@ void mainboard_romstage_entry(unsigned long bist)
/* We want early GPIO setup, to be able to detect legacy I/O module */
pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIOBASE, DEFAULT_GPIOBASE | 1);
/* Enable GPIOs */
- pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c /* GC */ , 0x10);
+ pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c /* GC */, 0x10);
setup_pch_gpios(&mainboard_gpio_map);
dock_err = dlpc_init();
diff --git a/src/mainboard/lenovo/t60/smihandler.c b/src/mainboard/lenovo/t60/smihandler.c
index 7707d624c8..bccb7f128a 100644
--- a/src/mainboard/lenovo/t60/smihandler.c
+++ b/src/mainboard/lenovo/t60/smihandler.c
@@ -49,7 +49,7 @@ static void mainboard_smi_brightness_up(void)
{
u8 *bar;
if ((bar = (u8 *)pci_read_config32(PCI_DEV(1, 0, 0), 0x18))) {
- printk(BIOS_DEBUG, "bar: %08X, level %02X\n", (unsigned int )bar, *(bar+LVTMA_BL_MOD_LEVEL));
+ printk(BIOS_DEBUG, "bar: %08X, level %02X\n", (unsigned int)bar, *(bar+LVTMA_BL_MOD_LEVEL));
*(bar+LVTMA_BL_MOD_LEVEL) |= 0x0f;
if (*(bar+LVTMA_BL_MOD_LEVEL) < 0xf0)
*(bar+LVTMA_BL_MOD_LEVEL) += 0x10;
diff --git a/src/mainboard/lenovo/x60/dock.c b/src/mainboard/lenovo/x60/dock.c
index 5b49498a84..f55428e66d 100644
--- a/src/mainboard/lenovo/x60/dock.c
+++ b/src/mainboard/lenovo/x60/dock.c
@@ -190,7 +190,7 @@ int dock_connect(void)
dock_gpio_set_mode(0x14, PC87392_GPIO_PIN_PULLUP, 0x00);
dock_gpio_set_mode(0x15, PC87392_GPIO_PIN_PULLUP, 0x00);
dock_gpio_set_mode(0x16, PC87392_GPIO_PIN_PULLUP |
- PC87392_GPIO_PIN_OE , 0x00);
+ PC87392_GPIO_PIN_OE, 0x00);
dock_gpio_set_mode(0x17, PC87392_GPIO_PIN_PULLUP, 0x00);
diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c
index 94c8a8fe03..d5dc9f57f5 100644
--- a/src/mainboard/lenovo/z61t/romstage.c
+++ b/src/mainboard/lenovo/z61t/romstage.c
@@ -183,7 +183,7 @@ void mainboard_romstage_entry(unsigned long bist)
/* We want early GPIO setup, to be able to detect legacy I/O module */
pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIOBASE, DEFAULT_GPIOBASE | 1);
/* Enable GPIOs */
- pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c /* GC */ , 0x10);
+ pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c /* GC */, 0x10);
setup_pch_gpios(&mainboard_gpio_map);
dock_err = dlpc_init();
diff --git a/src/mainboard/lenovo/z61t/smihandler.c b/src/mainboard/lenovo/z61t/smihandler.c
index d98a80957b..b93f48ee92 100644
--- a/src/mainboard/lenovo/z61t/smihandler.c
+++ b/src/mainboard/lenovo/z61t/smihandler.c
@@ -50,7 +50,7 @@ static void mainboard_smi_brightness_up(void)
{
u8 *bar;
if ((bar = (u8 *)pci_read_config32(PCI_DEV(1, 0, 0), 0x18))) {
- printk(BIOS_DEBUG, "bar: %08X, level %02X\n", (unsigned int )bar,
+ printk(BIOS_DEBUG, "bar: %08X, level %02X\n", (unsigned int)bar,
*(bar+LVTMA_BL_MOD_LEVEL));
*(bar+LVTMA_BL_MOD_LEVEL) |= 0x0f;
if (*(bar+LVTMA_BL_MOD_LEVEL) < 0xf0)