summaryrefslogtreecommitdiff
path: root/src/mainboard/lenovo
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-14 00:06:39 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-20 21:37:42 +0000
commitc308f021d26156ad03bb3969a3b785616ca51b82 (patch)
tree210614ea87a04efdca241fa199f24ee7c464e88f /src/mainboard/lenovo
parentc8d7c4834a6204fc32eb25a0955fe3c3f4ab60b9 (diff)
AGESA,binaryPI boards: Drop unused variables in ASL
Change-Id: I1d1323ab8bb8565c05fd50697e29c61f9932a2c7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50646 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/g505s/acpi/mainboard.asl8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl
index 4bde39df7c..27c48b5d31 100644
--- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl
+++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl
@@ -1,15 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
- /* Data to be patched by the BIOS during POST */
- /* FIXME the patching is not done yet! */
- /* Memory related values */
- Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */
- Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
- Name(PBLN, 0x0) /* Length of BIOS area */
-
Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */
Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
- Name(HPBA, 0xFED00000) /* Base address of HPET table */
/* AcpiGpe0Blk */
OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)