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authorNico Huber <nico.huber@secunet.com>2021-09-07 16:17:57 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-09-08 18:50:30 +0000
commite82075cfbce64905afded2b4b6b50691c3f648e1 (patch)
tree8648a4e41dc3878735ee8385736cafb5982a208d /src/mainboard/lenovo
parentf41a246dcf61a5b4a49feba0dc99a15bece887d5 (diff)
mb/lenovo/t400: Fix R500 override tree
`chip` entries always need a device node below them to actually get hooked up. Change-Id: Ie84694f586351ce327c8df9338e96377825ad7c7 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57468 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/t400/variants/r500/overridetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t400/variants/r500/overridetree.cb b/src/mainboard/lenovo/t400/variants/r500/overridetree.cb
index 79fe00c07e..cb059c65fa 100644
--- a/src/mainboard/lenovo/t400/variants/r500/overridetree.cb
+++ b/src/mainboard/lenovo/t400/variants/r500/overridetree.cb
@@ -20,6 +20,7 @@ chip northbridge/intel/gm45
device pci 1f.0 on # LPC bridge
subsystemid 0x17aa 0x20f5
chip ec/lenovo/h8
+ device pnp ff.2 on end # dummy
register "config1" = "0x05"
register "config3" = "0x40"
register "event6_enable" = "0x87"