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authorAngel Pons <th3fanbus@gmail.com>2021-06-20 13:36:38 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-06-22 04:43:34 +0000
commit670f4ca47163e957522030602371db254a3469d9 (patch)
tree3b1204b9f211da761cc63df83cb1a76f82a1b237 /src/mainboard/lenovo
parent2f135a9a69c724a95d6d50571118478a757020b3 (diff)
mb/lenovo/t440p: Drop redundancy in devtree comments
Remove some redundant parts of devicetree comments. This used to happen when using autoport, but has been fixed at some point. Tested with BUILD_TIMELESS=1, Lenovo T440p remains identical. Change-Id: Ie24b5430c7771c9ce4dda6c9a10d70ee9000df7c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55685 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/t440p/devicetree.cb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/lenovo/t440p/devicetree.cb b/src/mainboard/lenovo/t440p/devicetree.cb
index 09821be94c..a1f1ac778a 100644
--- a/src/mainboard/lenovo/t440p/devicetree.cb
+++ b/src/mainboard/lenovo/t440p/devicetree.cb
@@ -22,10 +22,10 @@ chip northbridge/intel/haswell
device domain 0 on
subsystemid 0x17aa 0x220e inherit
- device pci 00.0 on end # Host bridge Host bridge
+ device pci 00.0 on end # Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
- device pci 03.0 on end # Mini-HD audio Audio controller
+ device pci 03.0 on end # Mini-HD audio
chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
register "gen1_dec" = "0x007c1601"
@@ -54,7 +54,7 @@ chip northbridge/intel/haswell
device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1
- device pci 1f.0 on # LPC bridge PCI-LPC bridge
+ device pci 1f.0 on # LPC bridge
chip ec/lenovo/pmh7
register "backlight_enable" = "0x01"
register "dock_event_enable" = "0x01"