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author | Ronak Kanabar <ronak.kanabar@intel.com> | 2020-05-14 16:21:18 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2020-05-26 05:55:30 +0000 |
commit | 641221c0a155cc0c601839791efbce578f671199 (patch) | |
tree | 3e7e7a631ed42f90f2dccef5d52dfa2e97b745d1 /src/mainboard/lenovo | |
parent | 56f5cc7ee3dbdd258f14a9148918ec8aad10d50c (diff) |
soc/intel/jasperlake: correct IRQ routing Jasper Lake
Current Interrupt setting use 2nd parameters as device function number.
Correct as interrupt pin number according to _PRT package format.
{Address, pin, Source, Source index}
Reference:
- ACPI spec 6.2.13 _PRT
BUG=None
BRANCH=None
TEST=Build and boot JSLRVP Verify Interrupt mappings are same as PCI
INTR(0x3C) register and no interrupt storm is seen
Change-Id: I21462c6befea310a49eecf9ad1b5c8770eccd5bd
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41404
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
0 files changed, 0 insertions, 0 deletions