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authorAngel Pons <th3fanbus@gmail.com>2020-09-14 16:22:22 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-09-17 19:35:03 +0000
commit92717ff3e475546366ac6439a4a0d4852bb2cb60 (patch)
tree4141630e55b6499bf6709f3be56de170aa1082e6 /src/mainboard/lenovo
parent10240510a79901b0cf8ddfd8471ed412fb60bd36 (diff)
nb/intel/sandybridge: Drop invalid `DEFAULT_RCBABASE` macro
RCBA is located in the PCH. Replace all instances with the already-defined `DEFAULT_RCBA` macro, which is equivalent. Change-Id: I4b92737820b126d32da09b69e09675464aa22e31 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45348 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/x220/early_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/x220/early_init.c b/src/mainboard/lenovo/x220/early_init.c
index c0fece9dd0..109f08be6a 100644
--- a/src/mainboard/lenovo/x220/early_init.c
+++ b/src/mainboard/lenovo/x220/early_init.c
@@ -20,7 +20,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = (uintptr_t)DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,