mainboards: Move get_cst_entries()

Change-Id: I02cfbcb7a340bd574290e4ac486010fc4cbcd3be
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49351
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

3 files changed, 42 insertions, 37 deletions

diff --git a/src/mainboard/lenovo/x60/Makefile.inc b/src/mainboard/lenovo/x60/Makefile.inc
index 56fa18b13a..7bdd496a5f 100644
--- a/src/mainboard/lenovo/x60/Makefile.inc
+++ b/src/mainboard/lenovo/x60/Makefile.inc
@@ -8,3 +8,4 @@ bootblock-y += gpio.c
 romstage-y += gpio.c
 bootblock-y += early_init.c
 romstage-y += early_init.c
+ramstage-y += cstates.c
diff --git a/src/mainboard/lenovo/x60/cstates.c b/src/mainboard/lenovo/x60/cstates.c
new file mode 100644
index 0000000000..c6237bc592
--- /dev/null
+++ b/src/mainboard/lenovo/x60/cstates.c
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpigen.h>
+#include <southbridge/intel/i82801gx/i82801gx.h>
+
+#define MWAIT_RES(state, sub_state)				\
+	{							\
+		.space_id = ACPI_ADDRESS_SPACE_FIXED,		\
+		.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,	\
+		.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,	\
+		.access_size = ACPI_ACCESS_SIZE_UNDEFINED,	\
+		.addrl = (((state) << 4) | (sub_state)),	\
+		.addrh = 0,					\
+	}
+
+static acpi_cstate_t cst_entries[] = {
+	{
+		.ctype = 1,
+		.latency = 1,
+		.power = 1000,
+		.resource = MWAIT_RES(0, 0),
+	},
+	{
+		.ctype = 2,
+		.latency = 1,
+		.power = 500,
+		.resource = MWAIT_RES(1, 0),
+	},
+	{
+		.ctype = 3,
+		.latency = 17,
+		.power = 250,
+		.resource = MWAIT_RES(2, 0),
+	},
+};
+
+int get_cst_entries(acpi_cstate_t **entries)
+{
+	*entries = cst_entries;
+	return ARRAY_SIZE(cst_entries);
+}
diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c
index f6930bb93f..a9946b25d1 100644
--- a/src/mainboard/lenovo/x60/mainboard.c
+++ b/src/mainboard/lenovo/x60/mainboard.c
@@ -15,43 +15,6 @@
 
 #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
 
-#define MWAIT_RES(state, sub_state)				\
-	{							\
-		.space_id = ACPI_ADDRESS_SPACE_FIXED,		\
-		.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,	\
-		.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,	\
-		.access_size = ACPI_ACCESS_SIZE_UNDEFINED,	\
-		.addrl = (((state) << 4) | (sub_state)),	\
-		.addrh = 0,					\
-	}
-
-static acpi_cstate_t cst_entries[] = {
-	{
-		.ctype = 1,
-		.latency = 1,
-		.power = 1000,
-		.resource = MWAIT_RES(0, 0),
-	},
-	{
-		.ctype = 2,
-		.latency = 1,
-		.power = 500,
-		.resource = MWAIT_RES(1, 0),
-	},
-	{
-		.ctype = 3,
-		.latency = 17,
-		.power = 250,
-		.resource = MWAIT_RES(2, 0),
-	},
-};
-
-int get_cst_entries(acpi_cstate_t **entries)
-{
-	*entries = cst_entries;
-	return ARRAY_SIZE(cst_entries);
-}
-
 static void mainboard_init(struct device *dev)
 {
 	struct device *idedev, *sdhci_dev;