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authorDuncan Laurie <dlaurie@chromium.org>2016-06-02 15:23:42 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-06-09 17:06:58 +0200
commit205ed2d2b58f9b93c7c665002aef0c775e64cf63 (patch)
tree15adf5104da9bf23d064929fe152480e3a5ee39e /src/mainboard/lenovo/x60
parent8a14c39ac6c4ef3ed960d79aaf9e7c56b595f8f2 (diff)
skylake: Add function to set PRR for protecting flash
Add a function similar to broadwell to set the PRR for a region of flash and protect it from writes. This is used to secure the MRC cache region if the SPI is write protected. BUG=chrome-os-partner:54003 BRANCH=glados TEST=boot on chell, verify PRR register is set and that the MRC cache region cannot be written if the SPI is write protected. Change-Id: I925ec9ce186f7adac327bca9c96255325b7f54ec Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Commit-Id: abb6f645f5ceef3f52bb7afd2632212ea916ff8d Original-Change-Id: I2f90556a217b35b7c93645e41a1fcfe8070c53da Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/349274 Original-Reviewed-by: Shawn N <shawnn@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Shawn N <shawnn@chromium.org> Reviewed-on: https://review.coreboot.org/15102 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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