diff options
author | Sven Schnelle <svens@stackframe.org> | 2011-02-14 20:02:47 +0000 |
---|---|---|
committer | Peter Stuge <peter@stuge.se> | 2011-02-14 20:02:47 +0000 |
commit | e2ca71efd903a76426b754d4b385fac4a7947390 (patch) | |
tree | c57db9e50323738ac73a4e859c72eb1ff1460800 /src/mainboard/lenovo/x60/acpi/thermal.asl | |
parent | b9122895731212b991e1ef7a2b6acb791db73d91 (diff) |
Lenovo ThinkPad X60 / X60s Support
Adds support for Lenovo X60 series ThinkPads. So far, only X60s
(Model 1703) has been tested.
It's a basic patch without SMI and ACPI, as this makes it easier to
review. SMI and ACPI patches will follow.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/lenovo/x60/acpi/thermal.asl')
-rw-r--r-- | src/mainboard/lenovo/x60/acpi/thermal.asl | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x60/acpi/thermal.asl b/src/mainboard/lenovo/x60/acpi/thermal.asl new file mode 100644 index 0000000000..b7efc53c3a --- /dev/null +++ b/src/mainboard/lenovo/x60/acpi/thermal.asl @@ -0,0 +1,96 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +// Thermal Zone + +Scope (\_TZ) +{ + ThermalZone (THRM) + { + + // FIXME these could/should be read from the + // GNVS area, so they can be controlled by + // coreboot + Name(TC1V, 0x04) + Name(TC2V, 0x03) + Name(TSPV, 0x64) + + // At which temperature should the OS start + // active cooling? + Method (_AC0, 0, Serialized) + { + Return (0xf5c) // Value for Rocky + } + + // Method (_AC1, 0, Serialized) + // { + // Return (0xf5c) + // } + + // Critical shutdown temperature + Method (_CRT, 0, Serialized) + { + Return (Add (0x0aac, 0x50)) // FIXME + } + + // CPU throttling start temperature + Method (_PSV, 0, Serialized) + { + Return (0xaaf) // FIXME + } + + // Get DTS Temperature + Method (_TMP, 0, Serialized) + { + Return (0xaac) // FIXME + } + + // Processors used for active cooling + Method (_PSL, 0, Serialized) + { + If (MPEN) { + Return (Package() {\_PR.CPU0, \_PR.CPU1}) + } + Return (Package() {\_PR.CPU0}) + } + + // TC1 value for passive cooling + Method (_TC1, 0, Serialized) + { + Return (TC1V) + } + + // TC2 value for passive cooling + Method (_TC2, 0, Serialized) + { + Return (TC2V) + } + + // Sampling period for passive cooling + Method (_TSP, 0, Serialized) + { + Return (TSPV) + } + + + } +} + |