diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-01-13 22:57:12 +0100 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-19 08:50:58 +0000 |
| commit | 0c359e2405004668ab17fd6fda30b24a43751b90 (patch) | |
| tree | abcfa4916bed72483178b12e7731e41c08adfa82 /src/mainboard/lenovo/x230/devicetree.cb | |
| parent | f02e9e87b4b179ad4e2bd47cb332c847a38b0e1b (diff) | |
mb/lenovo/x230: Remove superfluous comments related to PCI devices
Since all devicetrees from lenovo/x230 are using the reference names for
PCI devices now, remove the equivalent comments documenting their
function.
Change-Id: Ia06f976ef1439377ff22149044feaa3463d2aeb8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79964
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Diffstat (limited to 'src/mainboard/lenovo/x230/devicetree.cb')
| -rw-r--r-- | src/mainboard/lenovo/x230/devicetree.cb | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index 52a2e70a22..f47e3b74f1 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -19,9 +19,9 @@ chip northbridge/intel/sandybridge device domain 0 on subsystemid 0x17aa 0x21fa inherit - device ref host_bridge on end # host bridge - device ref peg10 off end # PCIe Bridge for discrete graphics - device ref igd on end # vga controller + device ref host_bridge on end + device ref peg10 off end + device ref igd on end chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing @@ -52,33 +52,33 @@ chip northbridge/intel/sandybridge register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" - device ref xhci on end # USB 3.0 Controller - device ref mei1 on end # Management Engine Interface 1 - device ref mei2 off end # Management Engine Interface 2 - device ref me_ide_r off end # Management Engine IDE-R - device ref me_kt off end # Management Engine KT + device ref xhci on end + device ref mei1 on end + device ref mei2 off end + device ref me_ide_r off end + device ref me_kt off end device ref gbe on subsystemid 0x17aa 0x21f3 - end # Intel Gigabit Ethernet - device ref ehci2 on end # USB2 EHCI #2 - device ref hda on end # High Definition Audio + end + device ref ehci2 on end + device ref hda on end device ref pcie_rp1 on chip drivers/ricoh/rce822 register "sdwppol" = "1" register "disable_mask" = "0x87" device pci 00.0 on end end - end # PCIe Port #1 - device ref pcie_rp2 on end # PCIe Port #2 - device ref pcie_rp3 off end # PCIe Port #3 - device ref pcie_rp4 off end # PCIe Port #4 - device ref pcie_rp5 off end # PCIe Port #5 - device ref pcie_rp6 off end # PCIe Port #6 - device ref pcie_rp7 off end # PCIe Port #7 - device ref pcie_rp8 off end # PCIe Port #8 - device ref ehci1 on end # USB2 EHCI #1 - device ref pci_bridge off end # PCI bridge - device ref lpc on #LPC bridge + end + device ref pcie_rp2 on end + device ref pcie_rp3 off end + device ref pcie_rp4 off end + device ref pcie_rp5 off end + device ref pcie_rp6 off end + device ref pcie_rp7 off end + device ref pcie_rp8 off end + device ref ehci1 on end + device ref pci_bridge off end + device ref lpc on chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy register "backlight_enable" = "true" @@ -130,8 +130,8 @@ chip northbridge/intel/sandybridge register "wwan_gpio_num" = "70" register "wwan_gpio_lvl" = "0" end - end # LPC bridge - device ref sata1 on end # SATA Controller 1 + end + device ref sata1 on end device ref smbus on # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c @@ -144,9 +144,9 @@ chip northbridge/intel/sandybridge device i2c 5e on end device i2c 5f on end end - end # SMBus - device ref sata2 off end # SATA Controller 2 - device ref thermal on end # Thermal + end + device ref sata2 off end + device ref thermal on end end end end |