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authorKeith Hui <buurin@gmail.com>2024-02-05 19:18:43 -0500
committerMartin L Roth <gaumless@gmail.com>2024-06-08 00:19:23 +0000
commita911b758482025d46e132eeb2ed0279b65692075 (patch)
treefb8475ef03a0365132fefb82bc248468ef0a4784 /src/mainboard/lenovo/x220/variants
parentee126348726b24fbf6e5435bb2cf15417959a8f7 (diff)
mb/*: Remove old USB configurations from SNB/bd82x6x boards
Remove USB configurations and data structures from northbridge devicetree (SNB+MRC boards) and bootblock/romstage C code (native-only SNB boards). All USB configurations are drawn from southbridge devicetree going forward. Change-Id: Ie1cd21077136998a6e90050c95263f2efed68a67 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81882 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/x220/variants')
-rw-r--r--src/mainboard/lenovo/x220/variants/x1/romstage.c20
-rw-r--r--src/mainboard/lenovo/x220/variants/x220/romstage.c20
2 files changed, 0 insertions, 40 deletions
diff --git a/src/mainboard/lenovo/x220/variants/x1/romstage.c b/src/mainboard/lenovo/x220/variants/x1/romstage.c
deleted file mode 100644
index 593b7b2008..0000000000
--- a/src/mainboard/lenovo/x220/variants/x1/romstage.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <southbridge/intel/bd82x6x/pch.h>
-
-const struct southbridge_usb_port mainboard_usb_ports[] = {
- { 1, 1, 0 },
- { 1, 1, 1 },
- { 1, 1, 3 },
- { 1, 0, 3 },
- { 1, 0, 3 },
- { 1, 1, 3 },
- { 0, 0, 3 },
- { 0, 0, 3 },
- { 1, 1, 4 },
- { 1, 1, 5 },
- { 1, 0, 7 },
- { 1, 1, 7 },
- { 1, 1, 7 },
- { 1, 0, 7 },
-};
diff --git a/src/mainboard/lenovo/x220/variants/x220/romstage.c b/src/mainboard/lenovo/x220/variants/x220/romstage.c
deleted file mode 100644
index bd33cef65f..0000000000
--- a/src/mainboard/lenovo/x220/variants/x220/romstage.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <southbridge/intel/bd82x6x/pch.h>
-
-const struct southbridge_usb_port mainboard_usb_ports[] = {
- { 1, 0, 0 },
- { 1, 1, 1 },
- { 1, 1, 3 },
- { 1, 1, 3 },
- { 1, 1, -1 },
- { 1, 1, -1 },
- { 1, 0, 2 },
- { 1, 0, 2 },
- { 1, 1, 6 },
- { 1, 1, 5 },
- { 1, 1, 6 },
- { 1, 1, 6 },
- { 1, 1, 7 },
- { 1, 1, 6 },
-};