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| author | Jeremy Soller <jeremy@system76.com> | 2021-08-12 10:49:58 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-24 14:48:50 +0000 |
| commit | 83d795c45b602ed1736e80871b2bd5cd2ccf7490 (patch) | |
| tree | 21a0c671ff0b6e7d922d7ffd26607715aed978e2 /src/mainboard/lenovo/x200/cstates.c | |
| parent | 21d7c477a45cef879669d436003c5834d3078dae (diff) | |
soc/intel/tigerlake: Add PCIe root ports for PCH-H
Change-Id: I89e300adce2edeb9d9c2bba1782c212ee656a532
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56947
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/lenovo/x200/cstates.c')
0 files changed, 0 insertions, 0 deletions