diff options
| author | James Ye <jye836@gmail.com> | 2019-02-12 22:17:52 +1100 |
|---|---|---|
| committer | Alexander Couzens <lynxis@fe80.eu> | 2019-09-28 10:46:24 +0000 |
| commit | ef2e86edeba667dcb41fb5a752f695d603e5e5f0 (patch) | |
| tree | b4cd5268858a01720c303bfa9a625e0a16c0f508 /src/mainboard/lenovo/x131e | |
| parent | 59de112995523f52cedbdbd5d1dd770f6f53b5d3 (diff) | |
mb/lenovo/x131e: enable mSATA slot
Per google/stout.
Tested with SanDisk SSD U110.
Change-Id: I7cc9837f572236acac2007e95990e64c25a5d6e2
Signed-off-by: James Ye <jye836@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Diffstat (limited to 'src/mainboard/lenovo/x131e')
| -rw-r--r-- | src/mainboard/lenovo/x131e/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/x131e/devicetree.cb b/src/mainboard/lenovo/x131e/devicetree.cb index 2a98a60cac..2d15d87176 100644 --- a/src/mainboard/lenovo/x131e/devicetree.cb +++ b/src/mainboard/lenovo/x131e/devicetree.cb @@ -49,8 +49,8 @@ chip northbridge/intel/sandybridge register "gpi6_routing" = "2" register "gpi13_routing" = "2" - # Enable SATA ports - register "sata_port_map" = "0x1" + # Enable SATA ports 0 (2.5 inch) and 1 (mSATA) + register "sata_port_map" = "0x3" # Set max SATA speed to 6.0 Gb/s register "sata_interface_speed_support" = "0x3" |