mb/lenovo/thinkcentre_a58: Add mainboard

The following was tested:
- Using two DDR2 DIMMs
- S3 sleep and resume (on SeaBIOS it needs sercon disabled)
- Ethernet NIC
- Libgfxinit (native res and textmode)
- SATA
- USB
- 800MHz FSB CPU (Pentium(R) E5200 @ 2.50GHz)
- PS2 Keyboard
- Serial output

TODO:
- Add ACPI code for SuperIO devices (done in a follow-up patch)
- Add documentation

TESTED with SeaBIOS (sercon disabled), Linux 4.19

Change-Id: I483e1143e4095b8a58fed142d31ca7f233a854e2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30239
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 21 insertions, 0 deletions

diff --git a/src/mainboard/lenovo/thinkcentre_a58/cstates.c b/src/mainboard/lenovo/thinkcentre_a58/cstates.c
new file mode 100644
index 0000000000..128f6558e7
--- /dev/null
+++ b/src/mainboard/lenovo/thinkcentre_a58/cstates.c
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 secunet Security Networks AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpigen.h>
+
+int get_cst_entries(acpi_cstate_t **entries)
+{
+	return 0;
+}