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authorStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-27 21:34:16 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-30 23:05:40 +0200
commit4cc8c70c3297a99449ca731a7ea34d3fbe32d614 (patch)
treebf3876b2e852be0804803349c53f14fe949083cd /src/mainboard/lenovo/t60/mainboard.c
parenta403c687b16170966fa955ce55072edec84b5187 (diff)
Rework ACPI CST table generation
... in order to unify the Sandybridge and Lenovo implementations currently used in the tree. - use acpi_addr_t in acpigen_write_register() - use acpi_cstate_t for cstate tables (and fix up the x60 and t60) - drop cst_entry from acpigen.h Change-Id: Icb87418d44d355f607c4a67300107b40f40b3b3f Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/943 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/lenovo/t60/mainboard.c')
-rw-r--r--src/mainboard/lenovo/t60/mainboard.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c
index 1817b4b381..a9f4117e85 100644
--- a/src/mainboard/lenovo/t60/mainboard.c
+++ b/src/mainboard/lenovo/t60/mainboard.c
@@ -37,13 +37,13 @@
#include <pc80/mc146818rtc.h>
#include <arch/x86/include/arch/acpigen.h>
-static struct cst_entry cst_entries[] = {
- { 0x7f, 1, 2, 0, 1, 1, 1, 1000 },
- { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 2, 1, 500 },
- { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 2, 17, 250 },
+static acpi_cstate_t cst_entries[] = {
+ { 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
+ { 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
+ { 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
};
-int get_cst_entries(struct cst_entry **entries)
+int get_cst_entries(acpi_cstate_t **entries)
{
*entries = cst_entries;
return ARRAY_SIZE(cst_entries);